I really enjoy your videos, no hype, just calm presentation of the facts.

I remember stanning hard on AMD64 back in early 2000s. My first Ubuntu install. DVD playback and Brother printer drivers is a headache I'll never forget.

Very well explained 👍🏻

Stating the obvious: 1970-1990 is the same length as 2000-2020. Just to make sense for myself how long it got to develop 8080 to 80486.

Excellent summary Gary!

Great and interesting video as always 👍🐱

This is really well put together! Thanks for the video :) I really only started learning about the semiconductor industry after news of chip shortages so videos like these always help :)

Thanks for making this video. It is very informative.

this channel covers the most niche stuff and i love it

Your content is so great 👍

X86 and Windows have their “legacy” holding them back. Happy to see Intel looking at a risc-v investment

Noyce video mate!

Minor correction, the 80286 didn't have an MMU in the classic sense. It's protected mode used segmentation to expand the memory space. You could also use the "present" bit to swamp segments to disk - although I'm not aware of an OS that did it.

Nice. An interesting feature is the vector nature in opposition to SIMD (à la old Cray vector supercomputer). Anyway, the only video that clarifies a common misconception of this ISA, which many think that is an open source one, but actually an open base ISA specification which does not imply necessarily an open source implementation. In fact most extensions which gravitates around this ISA are closed source, namely DSPs, some MCUs, etc.

Gary i enjoyed your video. The new technology has always been worth my enthusiasm (although I'm not the youngest ok .... 60). I've been using Raspberry Pi 4 as my home PC for 2 years and my enthusiasm for ARM PC has no limits. Thanks for Chris from ExplainingComputers and Gary from Gary Explains. These are just brilliant people who inspire others. I hope that big sharks won't ruin the ingenious technology for Prfit greed.

Gary, where are you located? US or England? I’ll love to have a lunch or dinner, it would be amazing to meet you man! So awesome knowledge transfer in a nice way, big thumbs up 👍

Great video! Question about macOS 11, are the m1 Macs built on RISC V, or is it still x86-64? I thought the m1 was a RISC V chip.

At Intel, they pronounced the 8080 and 8086 as “eighty eighty” and “eighty eighty-six.” Similarly, the 80386 and 80486 was pronounced as “eighty three eighty-six” and “eighty four eighty-six.”

Gary, Can I please ask you to explain something to clear my confusion?! Windows 11 just announced that it will only run on 64bit CPU’s (I think this just means the OS will only be 64-bit?) but still supports 32 bit applications. While I understand that Intel CPU’s still have 16/32/64 bit ISA support - for pure ARM64 CPU’s is it possible to run 32-bit applications (or is it emulated somehow?) I guess the M1 can support emulation x86 (32bit) and x64 (64bit) apps - can’t it?

At 16:12 Is there any external support for memory to memory operations (copy for example)? Should there be?

Gary is brilliant, I hope 9 dislike will one day realize they were wrong. Changing your mind is positive and not a shame.

WAIT! I need popcorn for that. Brb

So from what I'm seeing here, RISC-V will end up dominating the microcontroller/embedded market first. I read a few presentation slides from some of the companies sponsoring RISC-V, and some of the reasons listed is not just because it's free- but because it's also well-designed, and without obligations to legacy design decisions. Because of this, it can even overtake MIPS and PowerPC despite both of these being free as well. RISC-V cores might not be that advanced right now, but since literally anybody could come along and make one, I can see some designs catching up quickly. AMD and Intel could use some of their own non-x86 specific IP for RISC-V. 3D cache could be used for anything, same with other manufacturing processes. Organizational talent determines a lot. If Nvidia manages to successfully buy ARM, a lot of companies will be unhappy enough to start switching to RISC-V for those particular needs. And if that's the case, why bother with either MIPS or PowerPC?

Could you please make a video in which ervery day application single thread and in which multi thread performance matters.

Why don't you use some kind of switcher so you can have your face still on the screen? The ATEM Mini Pro would really up your game. It would help when it's a bit dry.

Hi Gary, great video. Just would like to know, if ARM (Advance RISC Machine) can run MacOS, ChromeOS, AndroidOS, and WindowsOS, why can't they run on RISC-V? Couldn't they simply develop an ARM chip with RISC-V instead of the RISC version it's currently using?

I remember the 386. I had one as my first system. Man those were the days. Gaming was so awesome back then

So it's more like an API specification. Like C99 is an open standard implemented by different compilers and standard libraries, some of them proprietary.

I feel like it's getting a HUGE amount of traction this year with the MIPS processor which comes out at the end of the year featuring 512 cores and 1,024 threads :D

So, is it any different than ARM?

Thanks Gary.

Q oh yes someone finally thinking about quad precision. Could be useful and important. Lets see if there will be products. Many people out there seem to think youd never need more precicion than double, but I doubt they know really what they are talking about, as for big problems there is a very good chance that some certain problems can be solved faster even though single operations are (much?) slower...

anybody know how to learn RISC-V assembly ? is there any mobile-phone on RISC-V ?

Is ARM the future?

Is this the same RISC chip technology that used to be in the Amiga?

Gary at 6:03 I believe you meant RISC-III and RISC-IV

Sir ARM means advanced risc machines does that means ARM is better than RISC? Or ARM better than both risc and 86 which makes M1 better than intel and AMD processor.?

Oh man, the future is gonna be so good

You mean 10nm rather than 10mn. Good summary. Anything worth discussing on the differences between x86-64, ARM, RISC-V interrupt handling?

Is the title correct? To me video was what is RISK & RISCV vs ARM

There goes the neighborhood!

will RISC-V target the PCs or is it for low end IOTs?

4:40 - don't forget Intel so released a Pentium 3 variant (i think it was a variant) for the Xbox OG console.

What is to prevent Intel or AMD from adding the risk five instruction set architecture into one of their existing processors? The risk five instruction sets is very small compared to x86 and it seems to me that Intel and AMD could easily come out with a chip that runs both instruction sets.

It will lead to better and secure cpu instructions.

DIY RISC V CPU? Is that possible?

Oh, I could be wrong, but I thought Linus used a Sinclair QL for development of Linux - which was a Motorola 68000 processor (actually the 68008, the chopped down 8-bit version of the processor from Amiga and Atari ST fame)..?

Thank you Gary, you are right Arm is the biggest threat to the Intel/AMD x86 processors, so in the end the battle between RISC and CISC continues and I think Arm will eventually replace significant part of the market previously dominated by the Intel and AMD. For example in the enterprise market with the business critical servers x86 processors took the baton from the custom design processors like Itanium and its doing quite well. I also agree that if Nvidia succeeds to buy Arm both x86 giants Intel and AMD would need work very hard to keep and even harder to expand their market share as expectations to grow Arm in the future are quite obvious. Maybe you can make another video about what if Nvidia buys Arm, what it would mean for the market and for the future? ;)

Once we have software compatability solved we may eventually move to arm and risc v someday.

RISC is not always one instruction per cycle, some RISC processor can do multiple instruction per cycle, ex: using macro instruction fusion

Current obstacles for RISCV is its software is not there yet. Designing a high performance RISCV CPU is possible but nobody does it now since still waiting for software to catch up...

At 63 instructions just for the base, not including extensions, it's something of a misnomer to call RISC-V a REDUCED instruction set. I'm an old Z-80 programmer, and to me, that instruction set was huge, too. I didn't use 20% of it in actual practice. I have designed an ISA with only 16 instructions, and they're ALL useful. As a coder, I'd much rather have an ISA I use 100% of than anything else I don't use a fifth of.

4:14 Ummmm, nope. The Am5x86 was a fast 486, as in it was based on the 486 and ran in socket 3. Not quite what I'd call Pentium compatible.

In the past, yes i do remember the 4004 processor, it has always been. What can i do in one memory cycle. Memory is the bottle neck. This is true today, it takes a lot longer to go 6 inches than 100 nano meeters. But in consumer devices applications are king. Android has the tablet and phone apps today but China might change that if they embrace the RISC 5, US embargos on Google Android. Wait to see.

What will happen after we can't make the transistor any smaller?

You made a video about it a while ago, why are you doing it again ?

How about RISC-V vs. ARM?

will Open ISA be helpful in like building better emulators 🤔

What happen to Intel RISC processor Itanium?

Do you see Apple moving to RISC-V or staying with ARM? I would guess they are staying with the ARM-architecture tho since they just started transitioning to it.

Well ... RISC architectures eases low power gated clocks designs ... and unifies not only effective but efficient compiler & tool chain developments ... ! ...

Can someone tell me a gpus risc or cisc or something else.

I kept going to click to the next page and then stopping myself :)

I guess why people say RISC-V is the "Linux of hardware" is 2-fold: first, the ISA is royalty-free, meaning you don't have to pay anything to be RISC-V compatible. Second, you can add your own custom instructions on top of the RISC-V ISA and their extensions; the only requirement is to fully implement the basic ISA and all displayed extensions, meaning that software written for RISC-V will run on your custom core, even though it won't be using your custom instructions.

The stuff Apple are doing with ARM CPUs is all applicable to RISC-V too, and the RISC-V ISA is open, so it could advance quite quickly.

I look forward to my very near future Desktop computer being of a RPi form factor, powered by an M1+ equivalent CPU, at less than 1W TDP.

Congratulations on your accuracy! Almost every video I see on tech history is riddled with errors. The only odd thing I saw was saying AMD made x86 from 2017 to present day, when they never stopped. Perhaps it's Ryzen but you dropped the tm for some reason

11:21 me when I order fish and chips

🤔🤔 soooooo.... 16:44 you're saying that CISC ISA's use hardware to do the next-steps in micro operations automatically withOUT having to refer to the program on each micro operation buuut that comes at the extreme cost of generating a LOT more heat and some designs use more power to achieve it... Also you are saying that the load/store model (especially used in RISC ISA's) is designed to be all-work-must-be-done-on-the-registers..... sooooo ummmm you mean that if we think of it as: Register is your computer, 0xMEMORY is your computer's Floppy-Disk-drive, and then you do an operation like add 1 to a value in memory then we are BASICly doing a: LOAD from a Floppy Disk (iow: 0x100) into the coco/commodore's RAM (iow: Register R1) then do a VARIABLE=VARIABLE+1 on the value currently in the coco/commodore's RAM then STORE that VARIABLE's value currently in the coco/commodore's RAM onto the Floppy Disk in the same spot as from which it originally came from (0x100) but you could choose if you want to STORE it somewhere else (like another Register or another 0xMEMORY if you wish)....

risc is more efficient, but until risc can be designed to be a brute it wont get into the actual pc market and will stay in phones, iot, routers etc. Apple did do the M1 and it IS impressive, but its still not quite there. It would be cool if arm became a removeable socket design, but the other issue is Windows and ISA's. Pretty much x86 owns Windows and the world uses Windows so theres that.

SPARC/SPARC64 Power/PowerPC Apple used to use 6800, 68000. Boasted that 6800 would blow Itel away. Z80, Z800, Z8000.

So RISC-V can be more power efficient, then? Theoretically.

*Also FreeBSD

RISC depends on frequent breaking changes,(Freq for an ISA.) because maintaining legacy compatibility to support old proprietary binaries from companies that are long out of business is the primary cause of ISA and architecture bloat, and this bloat destroys all the advantages of RISC over CISC. The need for regular clean sheet advances means RISC can only become popular on the back of Linux/GNU and the associated FOSS environment, as FOSS is easy to recompile for new ISAs. Basically with FOSS compiler == supported. (BSD is an also ran at this point, held back by its license, it is more permissive than gpl2 but it gave away the whole store discouraging further open development.)

I really would like to have a PC with RISC-V ISA, FPGA, Vector and x86-64 ISA extensions for legacy compatibility similar to what apple achieves with their arm ISA M1. It is amazing how that chip runs Tomb Raider by rosetta 2 translation on a much more efficient level. The M1 even beats comparable intel chips with just some 30 Watts. This is crazy and RISC-V is said to be even much more efficient. Just imagine playing AAA console game titles on your smartphone. Also a FPGA of course is needed to be more flexible. PS: I don't know why "Gary explains..." videos have that tendency to spread biased information about RISC-V in favour for arm. Maybe it's because arm is british but politics is a bad advisor in tech subjects as people sadly know. For instance the objections in 19:12 when it comes to so called dangers of forking by new extensions, those points are actually much more obvious for proprietary ISAs. For instance Intel brought up MMX, SSE, AVX etc. behind a patent wall to have a selling point over AMD. Also arm extensions are patented. You are dependent from them all and you get even more incompatibilities also with arm, if you compare old with new arm cpu generations. It is a known fact, that not every x86 App works on amd cpus and 3D Now had also problems to catch up with MMX. It is only for a court settlement that intel and amd agreed on a cross licensing, that we got some fewer problems. Now both of them share the throne but are slowing down real Innovation if people would actually know history. To be fair, Amd seems to be better in that regard. Besides, forking does not necessarily lead to incompatibilities. An ISA is quite similar to an API. And Vulkan proves quite well, that many companies can agree on common standards and share the functionalties in favor to spread the techqnique. For instance ray tracing is agreed upon in vulkan, but how it is achieved can be cooked differently on the gpu and companies can keep their cooking recipes beneath that ray tracing API extension. It is well known from experience, that open source is a major advantage, to spread new technologies. So forking is not something bad. From that, innovation can derive much faster which might be established broadly if proven useful. But with closed source and patented hardware, companies will melk the cow till it dies from old age. The first x86-64 cpu with four cores came out in 2006. Now we got 2021 and four cores are still the standard in cpus. Compare this with the core development of GPUs. So much to the so called disadvantage of forking, which actually means innovating. PS2: Also RISC-V is surely not just interesting for low spec embedded systems as GE often suggests. If this was the case, why intel offered two billion Dollars for SiFive then Intel already got low power embedded devices. In fact RISC-V is that much efficient and powerful and capable, that there are several international plans to build supercomputers with it. So please stop telling people, RISC-V was some kind of a toy for poor royalty free engineers in some small hobby rooms. It is not. It is about billions of dollars and has the potential to revolute the market. Also arm by the way started small and still gets underrated. Only in recent years it draw public attention and made big news.

riscv is more like the bsd of chips. lol

isn:t it time we go to 128 bit? moores law x10 should be possible after this.

RISC-V is future

Should have mentioned 68k Macs

The problem is unlike Apple, programs on Windows would take years before they could support the new chips fully.

I say it every vid I'm stuck in this evil place of theives and tyrants PLEASE PUT YOUR STUFF ON LBRY PLEAZE

AMD already used RISC accompanied cisc

x86 is indeed (already) history…

I believe risc v adoption will be rapid and not in 5 or 10 years as you say. You say they are 10 years behind intel/amd but my 10 year old laptop works fine and does everything i need it to and with this performance and the power efficiency from riscV its going to be a killer

I started with a 386 an then got a 486 lol :d

I mean why would we need RISC-V when we already have ARM? Just to get away with royalty? I mean with open ISA cooperation still need to spend money to build an actual chip. I don't get it.

New chip fab technologies will be developed, making chip fab more efficient, less expensive, and therefore more accessible. That means more people making chips based on RISC-V implementations, which means faster innovation. I think X86 will be replaced by some future custom RISC-V implementation, but not necessarily from a company equivalent in size to Intel. Public entities can get in the mix, also, because RISC-V is open standard. Some governments do have a lot of money to put toward chip development, if they are so inclined (which it appears some are, for the sake of their own national security and economic independence). We should want as many people as possible developing new chip technology. Innovation is stifled when a few ultra large corporations control the pace of development.

You forgot Via they still make x86

RISC-V have more potential then other ISA because the power of openess.

Surely this is more like "Gary Reads" #garyreads

listen don't read what's already on the video. explain something. add more to what is being displayed.

CPU architectures alternative to x86 just don't sit well within Intel's businesses. Intel owned many other alternative chip architectures before, like iAPX 432 (i860, i960) and Itanium. They all died horrible deaths while x86 always stays Intel's favorite. The cost of a few billions to buy Sifive is simply nothing to Intel either. Once Intel owns Sifive and all its IPs, RISC-V is going to die too.

13:33 Intel stuck on 10nm and AMD on 7nm is just WRONG, I'm sorry to say. AMD 7nm is nearly exactly the same as Intel 10nm. This is brilliant marketing, because the "7nm process" is a commercial term and does not represent any geometry of the transistor. ( en.wikichip.org/wiki/7_nm_lithography_process or en.wikichip.org/wiki/5_nm_lithography_process ). This change from physical structures on the chip to a purely marketing term happened in the 90's, before then a "XXX nm node" typically described the gate length in the transistor. The MBA's took over and engineering terms were replaced by marketing terms!

You are wrong

Your claim that "RISC CPU performance is generations behind x86" needs clarification - in an equal benchmark condition(clock freq, OS family, app task), all RISC CPUs perform much better than x86. The simple reason behind this is the x86 needs to run many microcodes (similar to RISC instruction) for every x86 instructions. In addition, compilers can generates much more optimized code for RISCs than x86. Late 1990s, x86's life time wasn't positive as so many RISCs were beating x86 - performance. That time, however, the CPUs were clocked at most 100MHz, where x86 cannot compete RISC for any non-floating point benchmarks. Just before the dotcom bubble, the silicon started its evolution to speex the clock - when x86 is clocked few hundreds MHz, not much performance diff with RISC. And so those many high performing RISCs suddenly lost their monentum as there were so many x86 apps (even x86 Linux was the most stable) waiting for better performing x86. Most CPU people would agree that x86 ISA is a stone age artifact that should have been gone years ago but still much alive and strong - simply because of this SW compatibility. Nowadays RISC V became highlighred because there're apps require more CPU power than fastest x86 - I think RISC may resurrect to help those power hungry apps.

Anything other than benchmarks is useless.

At doing some specific things probably x86 will always be better RISC is too simple

"Upto" is not a word. It's a two word phrase: "up to." Also, at 20:16, it says "Intel needs to move past 10mn." That should be nm, not mn.