I am currently doing my master in eletronic Engineering and by far this is the best explanation i have found in the internet, very complete and easy to understand. Congrats

Thank you! This is the best explanation I've found in YT.

I love this explanation. Thank you!

This is by far the best explaination

This video saved me so much time - just the information I needed. Please make more!!!

Super video. Just the right length and depth of content. Thank you!

Good presentation. It's all very clear.

Great explanation. Thanks!

Excellent work. Thanks for your video

Best explanation... Thanks!!

9:52 detail about modes & speed: Clock stretching. If it wants to, during transfer the slave is allowed to hold the clock line low. The master has to wait until the clock line is released. The slave can effectively slow down the speed

7:47 note about open-drain terminology: Drain is actually plus (aka VDD). Source is ground (aka VSS). Open-drain means I can only connect to VSS, but not to VDD. so when he said a "logic that opens and closes a drain", he meant logic that can *open and close a source*.

Fantastic video!

best explanation in the web

Very good explanation.

Thanks for the Video. This Video was very Useful. Can you post another i2c video Explaining about the Arbitration Process and Clock Stretching Concepts ?

Thank you .

Excellent! Thank you

Can someone tell me how this ack bit works? As in the video it is set by the receiver. So, the sender send the data and the ack is set by the receiver at the end? If yes how it happens can anyone explain?

Thank you for the excellent video. Could you share your slide?

Thank you!

Very good video

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legend

im confused , lets take the example of a 16x2 LCD display with I2C module , the LCD have VCC, GND,V0, A and K pins which are the power and light, and there is the D0-D7, RW, RS AND E for typing the characters so how on earth can the I2C deal with the RW , RS and E signals while the 8 bit DATA are occupied for the D0-D7

Is not I2C multimaster?

Nicely edited to remove the NXT reference. Thank you. You're welcome.

🎯 Key Takeaways for quick navigation: 00:00 🌐 *Overview of I2C Protocol* - Brief introduction to I2C protocol. - I2C developed by Philips in 1982. - Purpose: Short-distance data communication using a synchronous Master-Slave protocol. 01:12 🔄 *I2C Topology and Connection* - I2C topology involves a master connected to slave nodes. - Two shared lines: SDA (Serial Data) and SCL (Serial Clock). - Connection details: Shared pull-up resistors, dynamic addition/removal of devices. 01:40 📡 *I2C Frame Structure* - I2C frames initiated by start conditions. - Master sends slave address and read/write indication. - Frame ends with a stop condition, ensuring bus availability. 03:49 ⏰ *Timing Relationship in I2C* - SDA transitions only during the clock's low phase. - Ensures unambiguous start and stop conditions. - Crucial for preventing contention in data transmission. 05:02 🎭 *Read/Write Bit and Acknowledgment in I2C* - Read/write bit indicates the master's intention. - Acknowledge (ACK) bit confirms proper data reception. - NACK (Negative Acknowledge) signifies lack of acknowledgment. 06:00 📊 *Data Transmission and Byte Handling* - Data sent in 8-bit bytes, MSB first. - Each byte individually acknowledged. - Stop condition indicates the end of the frame. 07:38 🔗 *Role of Pull-Up Resistors in I2C* - Pull-up resistors maintain idle high state. - Open drain system ensures quick pull-down to ground. - Pull-up resistor values affect communication speed. 09:19 🚀 *I2C Bus Speed Modes* - Various modes with corresponding achievable speeds. - High-speed and Ultra-fast modes modify standard I2C behavior. - Practical data rate influenced by pull-up resistors and bus capacitance. 10:01 📝 *Summary of I2C Protocol* - I2C widely used for short-distance data exchange. - Master-slave communication through frames. - Pull-up resistors, open-drain, start/stop sequences are key elements. Made with HARPA AI

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Best video

Thank you! This is the best explanation I've found in YT.