Legend

Was there ever a video made about the anti log circuit that is not temperature dependent?

You're literally a life saver bro! I didn't understand any of this!! But after watching your videos!! I understood everything so perfectly!! Thank youu! Keep up the good work! 🎉

Love this, I have no idea why my professor didn’t connect the dot convention to the physical inductors, this is way more intuitive.

Thanks

What is the reference voltage in the temperature compensated log amplifier? What do I connect there?

can you provide the notes too ?? like for all the topics related to op amp ??

why Zin is just not equal to => Rb//(r(pi)+R(E))

Kal kiska paper hai DLD ka?

UKposts lectures are better than college lecture

What is gain? 😢

Kuch samaj ni aya

Thanks for the info

Saviour of many college students😊

love you sir g

V.Nice 🎉🎉

ur channel literally never disappoints!

Sir, I didn't understand why we made the SIPO register like that, what was our primary goal of doing it?

this legitimately blew my mind instead of blowing my head off like in class

in last question how nmos is on when both A and B are 1 ?

amazing job

Thank you. I was looking to extract an equation B And summarize it and understand it 😍

Thanku so much

شرح ممتاز ومفصل بدقة

Excellent as usual 🎉🎉

Very good video, gave me the foundations to understand more complex modulation

*One of the things I love about electronics engineering is knowing all about a subject and how to explain it before I've ever even encountered it! lol* As soon as I read the subject, I knew induction lag from wire length, input capacitance and logic gates or steering/blocking diodes would be the culprit. *I also knew to correct this with each flipflop module, it would require a coordinated delay as in hold time, to resolve potential lag between the flipflops.* I didn't finish my degree and I suppose not even close, but I did complete enough that strangely, I understand about any subject thrown at me with admirable depth since I've never covered it. *A lot of this is due to making it through most analog fundamentals, and then self study over the 13 years that has followed since I left college.*

Great as usual 👌. Still how many topic is pending in digital sir?

How it is 1v after R divides by R + 7R

The link for the other useful videos related to Synchronous digital circuits. 1) What is Setup Time and Hold Time? ukposts.info/have/v-deo/a6RpopqPaZ6iqXU.htmlsi=p3e0qC4KR3T4KL9w 2) Sequential Circuits (Playlist) ukposts.info/slow/PLwjK_iyK4LLCCpnnybEztvRqxpMyfgarS&si=4K48RCXp9fU9Re_W

very helpful but Idk if you deff but the audio is destorted always ... fucks up the great video

Good explain ❤❤❤

Moral is, we should try to cover all one's using bigger and less number of groups in K-MAP

Thank you sir

How can Ic be max when Vce is 0? When Vce is 0 doesn't the CB junction get forward biased causing no current in Ic except Icbo

@10.19 wont the formula of k have 2 Id/vov^2?

Thank you so much!!!! Edit: Thank you for all the likes

Best Explanation

Very awesome explanation sir 👍🏻

😢

Thank you for all the videos you upload. I love your channel. 👍

I ' m korean and i m here to see your video beacuse i m learning this in high school..my school teaches this content in subject, computer..i just want to say thank you for uploading this video you save my life...i spend so much time on this, now finally you made me be understood

Everything is explained so perfectly. But The Properties of Common Base Configuration are not mentioned??

where is above the head button

oh nooo poop accent

show your face

Very nice video

End sem se 4 ghante phle ...m kanhaiya voh Bhaiya 😢

Thanks

OMG. That was the easiest explanation on earth 🥰