Yes, but doesn't fully shield the H-Field component unless it's a special mu-metal designed to do that. Nickel screening alone mostly works on the E-field component, but only has about 1/100th the permeability of MuMetal so it's not that great on the H-field.

@@EEVblog could you please do an smd vs th emc?

kapios kapiopoylos There would be hardly any difference if you kept the layout otherwise identical

What’s really hard is trying to shield low frequency signals, it was once described to me that trying to stop 50/60 Hz is equivalent to trying to stop a bullet with tinfoil. High frequency of hundreds of MHz or GHz that a modern laptop would produce can be pretty much stopped by nearly anything in its path.

npgatech it’s not just black magic to some of us, it’s black magic to ALL of us lol... there’s principles you should follow, but a way to engineer this problem out of existence would be impossible, it’s so dependent on each design. I’ve had job interviews where the chief engineer would desperately ask if I had any EMI compliance experience, because they had failed the test so many times and didn’t have a clue what to do about it... if you end up with a product that’s badly misbehaving it can be a real nightmare even for professionals that specialize in this type of work... the problem you will face is not learning the techniques, it’s the massive expense of it; it’s stupidity expensive to test EMI, and without testing you will have no idea where you are. You need really expensive gear just to start asking if your efforts did anything at all...

Yes, it is an excellent idea to put small resistors in series with the IC outputs that drive high speed traces. This helps control the edge rates, reducing radiated emissions. It also reduces the current spikes as the high speed outputs drive the capacitive loading of the traces, vias, and other IC input pins.

The resistors typically allow you to match the impedance of the trace. This stops current sloshing around hence lowering emissions. Think of a wave in a bath of water. Now put some form of blockage in the path and you will see ripples all over. This is what impedance mismatches are. You are trying to make everything look the same to the wave fronts. A better analogy is your tyre across a dirt road and the suspension. Fill in the holes and you creat a smooth surface, or remove dirt piles and create a smooth surface.

Thanks. Can't say I've seen it anywhere else either which is why I was interested in doing it. Perhaps another video with a 6 layer version with ground planes on the outside layers?

Or even a four layers with the ground planes on the outside.

Yeah, doh, layer with ground and power outside. Crosstalk signal integrity on signal layers isn't really an issue here.

EEVblog You video should be used in electronic schools! Why not make the top and bottom layers ground with the traces and power layer internal? Would that make it super shielded?

@@Daveyk021 lol. Maybe it would. On the other hand, having had to do amateur fixes to old electronics at times, the thought of having all the critical traces being internal within the board kinda gives me nightmares... Multilayer boards in general can be a bit intimidating when you're trying to figure out what the circuit looks like from the PCB traces alone. When large chunks of the traces are effectively invisible... Well... Yeah. Good luck. >__

Yep, can make a huge difference when you have an intentional high-ish power transmitter on your board!

Michael Moorrees No, compliance is still required for foreign products.

Of course testing is still required, but is it actually performed. The thing is when Chinese products are sold directly to customers on websites like eBay, then the testing might be just a sticker. The importing party is responsible for compliance, and when this importing party is a end-user who doesn't know or care about compliance, then the Chinese manufacturer wouldn't bother performing tests. When I have a company importing Chinese electronics and reselling them, then I must be sure they're complaint.

GromBeestje That’s a downside of importing items. If it has a compliance label then it also has an associated number that you can check. Some stuff I have seen has no compliance at all, or only domestic compliance (which may be tighter in some cases - particularly when you have Trump toadies in charge of compliance). Retailers are always liable for what they sell, and certainly here items are anonymously bought by compliance authorities and sent to labs for verification. If they don’t comply then the retailer must recall the item(s). I’ve seen it happen with appliances a couple of times, and often with infant and children’s clothing and the like. Regulation is a necessary part of a functional society.

heh. I have a lot of old game consoles and computers around, and it's interesting seeing the progression in the shielding. Also the history of some designs. Like the 800XL vs it's predecessor from 4 years earlier. Mostly the same internal components, but the shielding... The early 80's variant has some pretty hefty metal shielding inside the plastic outer case... But the late 70's variant is basically all metal construction with an additional, very thick inner layer of metal just for shielding purposes. Because at the time it HAD to be to have any hope of meeting compliance standards, yet a few years later near enough the same internal hardware could get away with comparatively flimsy and insubstantial shielding. (still extremely heavy shielding compared to more modern devices though.)

KuraIthys It’s more a case of not knowing how to meet the standards, so ensuring compliance by excessive shielding. By the early 1980s it was easier to include EMC compliance testing in the R&D process.

That's the plan

Thanks, I try to reply to comment as much as possible

ok!

@@EEVblog you could go deeper in different kinds of electronics certifications too, for example for consumer, industrial and military rating designs.

Spooky

@@EEVblog Spooky, but convenient. I think you planned it that way all along... haha

Yeah, not much cost difference these days.

That would be an interesting experiment.

I guess I just asked this question myself. Would be very interesting

@@EEVblog I would love to see that. Also, what effect does placing a ground "ring" around the outer perimeter of the board that attaches to the device connector shields and then attaches to the board ground plane through capacitors? I know that technique is for ESD protection, but does it help to reduce EMI at all? If you want to see an example of what I'm referring to, you can look at the BeagleBone PCB files. They have that "ground" perimeter on every single layer of the board, not just the outer layers that connect to connector shields. Does that have to do with the high-speed DDR or HDMI signals that are on the board?

Oopps, just asked the same thing.

With a board with 100% through hole components, not much difference except for the better shielding of the signals that now are inside a shielded box (planes on the outer layers). In a board with SMT components it makes a big difference, since having ground/power internal layers means they are almost a complete plane with no voids, while if they are on the outer layers, you have all the pads of the SMT components creating voids and discontinuities in the planes which reduce the effectiveness of the planes. But if you are really concerned with emissions and you have money to spare for a couple of extra layers, you can fill top/bottom layers with ground (only if there is another solid ground internal plane) plus ground ring on the edge of every other layer and use lots of vias on the edges of the PCB to make the PCB like a shielded box for all the signals in the internal layers. Mentor Graphics wrote a book about how using top/bottom layers as ground helps to reduce the number of layers (on board with 16+ layers) since it means bypass caps don't need a via to ground (otherwise every bypass cap has a via to power and one to ground). Also the pair power/ground planes creates a capacitor which is part of the power distribution network to the high speed chips. Changing the position of the power/ground planes in the PCB stackup will change the capacitance and the inductance. FPGA (or other highs speed ICs) companies have lots on apps notes on this topic.

I was thinking about that before he mentioned it, definitely would be neat to setup a rig for that. Kinda like a CNC machine and you put the board in and it just slowly tests each spot. The same rig could perhaps also be used for taking very high res photos of PCBs. Imagine doing something kind of like google maps but with PCBs.

Yes, I was thinking a printable detector for a 3d printer, Dave did say he was going to show how to "roll your own detector" now we could print a clip on case that attaches to a 3d printer head like my creality ender 3 and boom a few hours work and you have a very high spec 3d EMI scanner! the ability to create 3d plots would be of immense use for problematic layouts and great ones too, the ability to log the EMI values in 3d space will lead to all sorts of clever solutions... just a brilliant idea.

It also raises some interesting points too, like getting the DUT to behave in stable consistent way over time, as the scan progresses you don't want the test device changing power levels or turning on and off antennas etc.

You can use your scope FFT function

@@EEVblog Yes, thanks. I did buy a FFT module for my Tek TDS3054 scope so I am equipped. It may be necessary to buy the preamp and "sniffer" probes like you used.

Well spotted! I can confirm it only makes a slight difference, about 1-2dB tops.

@@EEVblog Thanks for checking! :)

And BTW, it doesn't change the characteristic response shape, just the average amplitude by a small amount.

EEVblog But throughout the video. Both had same general shape, at some distance (you kept mentioning 15dB).

@@EEVblog thats what they all say ;)

Sure!

Matplotlib may also work quite well for the application. its easy to use. there is a library called seaborn which is even better for the task.

where can I get the update and how much is it? ;-)

Do you have any opinion regarding the pros and cons of having 4-layer boards with the power-planes as the outer layers and the signal tracks on the inner layers, versus having the signal tracks on the outer layers and the power-planes on the inner layers?

@@MaxWattage 1. Propagation delay is higher for internal layers. 2. You'll need a ton of vias, that would break up the ground/power planes and that wouldn't be great for return paths. Also reducing vias on high speed signals is desirable. 3. It would be difficult to rework the board if needed.

@@EveryThingTechet Points 1 and 3 you are correct. Point 2 is completely wrong. It wouldn't make any difference to the number of vias. You could simply swap the layers but still use the same artwork. You could actually REDUCE the numbers of vias by using blind/buried vias which you can't do with the signal layers on the top and bottom.

@@mrgibbo63me46 nah it really would increase via count. Depending on the board, you could add a ton of vias. Some signal traces wouldn't normally go into the middle or bottom layers, but to make a ground plane on the outside you'd have to add 2 vias per trace.

@@TheRealMonnie Definitely true for an SMD design. Through hole like in this video - the layer orders would not affect via count. You want the power/GND layers to be close together though - increases capacitance between them. There is something to be said for having further GND on additional outer layers and the Faraday shield effect. High speed data is often sandwiched between 2 GND layers to maintain transmission line impedance.

... at the 10:55 mark.

look through the texas instruments and analog devices data sheets for their high perormance ADCs and DACs.

Frans de Bruijn Looking in random data sheets for this is going to be hit or miss, as different writers and skill levels will be used from one datasheet to the next.

@@johnfrancisdoe1563 The datasheets often show the component layout with ground isolation for components that have both digital and analog components. T.I. has the board layouts for their evaluation boards available for download, thats a good start to see how they do things. There is also some software called AppCad that you can use for calculating the impedance of tracks if you want to design controlled impedance boards. this is especially important when you are working above 20mhz clock speeds.

The information is conflicting because people try to compress a complicated subject into simple rules of thumb and this rarely works in EMC. As for splitting ground planes, I'd try to avoid it. It can have benefits, but the risks are much bigger and it's full of traps. 9 of 10 times a single uninterrupted ground plane will be best. As for information online, check out Henry Ott's website and the book EMC for product designers.

BTW, I've found myself describing things of dubious quality "a bit how-ya-doin'" in real life. I that an Australianism or more of a Daveism?