Prevent mistakes by downloading my DESIGN REVIEW CHECKLISTS for the schematic circuit, PCB layout, and enclosure 3D model design: predictabledesigns.com/design-review-checklists-youtube/ And get your other free guides: Ultimate Guide - How to Develop and Prototype a New Electronic Hardware Product in 2023: predictabledesigns.com/guide From Prototype to Production with the ESP32: predictabledesigns.com/esp32 From Arduino Prototype to Mass Production: predictabledesigns.com/from-arduino-youtube/ From Raspberry Pi Prototype to Mass Production: predictabledesigns.com/rpi Want my personal help on your project? If so, check out my Hardware Academy program: predictabledesigns.com/Academy

For newbies, showing some KiCAD or Fritzing examples to illustrate how the mistakes look and how it should look would really help.

Back in 2001, I was employed (by a UK based German company) as a PCB pre--production proof reader engineer, as in I checked over client's PCB designs before they were committed to production. I would then send them back a detailed report highlighting all the errors that needed fixing before actual production (in German or French). Apart from the occasional "forgot to send a mirrored image for the bottom (underside) of the PCB, ignorance of Kirchoff's Law regarding trace current limits, thus creating adhoc PCB trace fuses, was more common than you'd expect. One memorable designer expected to push just over 4 Amps through a power return T10 trace, which he'd narrowed in order to squeeze it past a component. Not all were bad, as some PCB designs were perfectly designed. It was the terrible ones that were hard work. those clearly designed by an inexperienced rookie, usually with every fault that you listed on one PCB. These could take one or two days to scrutinise. I'm just glad that I don't have to do that job anymore as I'm now retired, due to Parkinson's disease.

At 4:30, actually, we don't call trace length equalization lines "delay lines" we call them "serpentine lines", yes they both "delay" a signal using length, but delay lines is a term reserved for components (not traces) that delay a signal in various ways.

Excellent video, just one thing I usually advise is to keep a single ground plane for beginners. I have seen way too many digital signals crossing split ground planes and causing EMI, while in most circuits with a proper, single ground plane digital noise does not travel far enough to affect the analog signals.

I’m so glad I’m only a software engineer. You guys are kings among kings.

Great video! Splitting ground planes is a complex issue. I default to not splitting the planes even for sensitive mixed signal boards.

Sharp corners are generally fine < 1 GHz or so. Multiple capacitors are generally just a holdover from THT days where there was significant inductance within the cap. These days, use the largest value for the package that's reasonable. Sometimes going up a package size gives you more options.

After 15 years of PCB design under my wings, with defense and aerospace projects. Comparing myself to my beginner days I would say a large part of these are for advanced designs and generally won't be understood by beginners. One of the most basic and important one to immediately start following is even if you don't understand exactly why is USE decoupling capacitors and place the decouling caps close to the sourcing and loading devices (ie. linear regulator's input and output and microcontroller's power pins). Explaining ground currents and planes is mostly going to be too much, when you're just focusing on getting the correct components into the schematic based on what you have available or are planning to buy, connecting them and then transferring that to the physical reality in the layout side and double checking that you used the correct packages and pinouts. I have made many mistakes over the years, some critical and some that could be fixed with a botch wire, but I kept at it, learned from my mistakes, learned to diagnose and find the problems and fix them for the next board version. Find an interesting project that feels challenging, but preferrably no overwhelming for your skill level and start making!

Always make sure the area on the top equals the area on the bottom. A mismatch can cause serious problems.

I came across a memorable one back in the 1980s. A computer video card, complete with "QC" sticker which had a copper bridge (unetched) between two tracks underneath the solder mask. A few seconds with a sharp scalpel took care of it and the card was working. How it passed quality control remains a mystery. A different one, this time heat-related I discovered in a guitar amplifier. The board was mounted vertically with the power amp heatsink placed directly below an LDR which served as the modulation element for the tremolo. Guess what happened to its resistance when the heatsink got hot. Yep, the amp faded out even when the tremolo wasn't in use; the modulating LED was simply switched off leaving the LDR in-circuit. There are many other design blunders I could list - too numerous to mention.

This was very good. After doing PCB design for years on RF circuitry, I still learned something. I haven't really given it much thought about proximity of inductors. Just positioning.

I really appreciate the effort you've put into creating content on PCB design. While watching, I felt that this video was a bit on the general side and contained some outdated myths - something I've often experienced when seeking information (and mostly in official datasheets). However, I understand that catering to a broad audience can sometimes necessitate this approach - it's easy to follow for new PCB designers. I'm always on the lookout for more in-depth material, much like videos from Altium Academy, Rick Hartley, and Eric Bogatin. Their experienced insights often leave me in awe. In future videos, it would be fantastic to see topics like choosing specific components for different circuits or an explanation of component parameters, or about situations where you can't follow all good practices and have to make compromises. Such content could provide valuable, detailed knowledge for other PCB design enthusiasts like me. Looking forward to exploring your other videos and seeing what else I can learn. Thanks for your contribution to the PCB community!

This is actually so nice, to many common mistake videos are honestly something useless and don't pertain to people that already have the bare minimum knowledge. Will definitely reference this in the future as I learn :) Also, when you mentioned placing inductors perpendicular to each other my first thought was of accidentally making a Halbach array and making the problem even worse lmao.

Hey, I just wanted to say thank you for this extremely helpful video. I'm just getting started, and this was an appropriately technical, yet quite accessible overview. THANK YOU!!

At 5:54, Yes, impedance of a trace is not its resistance although both are measured in Ohms. Resistance in Ohms is a circuit's opposition to electron flow. Impedance is the "reactance" of a circuit in Ohms as high frequency signals propagate (and reflect) along the trace. The trace width, copper weight thickness, the thickness of the dielectric layer under it, the material of the dielectric, the ground plane under that, vias, nearby circuits traces, and if the trace is on a surface layer (micro strip) or "sandwiched" between power/ground plane layers (strip line) all factor into the impedance of the trace at a given frequency. Many people that layout PCBs in the defense industry are not electrical engineers and don't really understand Impedance and its effects, they think of the design only from a DC perspective and go mostly by the "rubber band" relationship of the signals and thus the design engineer has to spend many hours with the PCB designer to get the artwork correct. For example, even though you may have a clock that is only 1 Hz (1 tick per second), the edges of that signal may be very fast, say 1 ns, that is an AC component of 1 GHz - that is Radio Frequency - and thus impedance control and signal integrity need to be considered when laying out that signal trace or reflections in the trace can cause distortion of the signal that is so severe that the circuit will fail to work properly. Then there is coupling to consider. For example: that same clock trace should have sufficient distance away from other signals. Here, those 1 ns edges "transmit" like a brief radio pulse (agressor) and can "induce" a noise pulse into a nearby (victim) trace. Another issue is "series termination resistors" which MUST be placed as close to the device driving the trace. Because many PCB designers just go by the "rubber bands" they have no idea on which line is the driver and which is the receiver and they end up putting the resistor anywhere - which will have to be fixed after the design engineer "finds" the mistake. Most PCBs designers don't even look at the schematic and can't even see these requirements in the design - to them it is just a bunch of lines they need to connect and again the design engineer will provide notes of some critical signals but will still have to sit down with the PCB designer. Most high end CAD tools have constraints that you add to the schematic so the PCB designer is "forced" to route it properly even when I am not shoulder to shoulder with them at the moment. Using constraints frees up a lot of my time and insures a perfect PCB with little intervention on my part as the responsible design engineer. For example: I will place a constraint on the signal that drives the resistor to be no more than 300 mils long. The PCB designer will still get two rubber bands during placement, but as soon as it is placed too far away, a warning pops up to tell the PCB designer to move the resistor closer to the driving component pin. The PCB designer cannot modify the constraints, so they have no choice but to place the resistor properly and I don't have to worry about it being wrong because the Design Rule Checker will tell me if it was wrong (if it could have been, but it wont). If the PCB designer has a problem with a constraint, they call me, and then I decide if I can relax the constraint a little bit or not.

I fall into the novice/enthusiast category and I deal with a mix of analog circuits and digital. A watched a video on altiums channel a while back where if you have signals above 100kHz the ground signal return will try and return as close to the signal trace as possible. If you have a ground plane on a 2 layer board that ground plane is 1.6mm from the signal trace. Any other trace closer to than 1.6mm to the signal trace will instead carry the ground return for that signal. I redesigned to put explicit ground traces on the same layer either side of and as close to my important analog signal traces. The noise reduction in the signals was amazing.

Wow, this is so much to keep track of that it kind of makes my head spin! Thanks for the video.

Thank you so much! This was the perfect video for where I’m at on my product design journey.

I don't main English language but I understand over 90% of your video without sub. That's great! You speak and explain are great

If one has the analog in one section of the board (say one corner or edge) without digital signals or ground returns running through them, than separating the analog ground is unnecessary--at least for boards I've made (which admittedly are not very high speed).

thanks , now i will have to watch all of your videos. needed this

Pop up in my feed. Great video. I design pcb many years ago in my first job, now im still making electronics as hobby projects. My best solution to avoid problems i to print every layer from gerber on foil, an check using window as backlight. Thanks for sharing :)

hey man this is a really great video. i just got started with kicad for the first time and youtube brought me here. i'm getting a lot of value out of this video. i'm gonna hit that subscribe button so freaking hard. thanks for your work

It is refreshing listening to someone who knows what they are talking about and explains everything with such clarity. Good PCB layout whilst notionally totally scientific has an element of black art to it. My experience of designing PCBs is low and whilst understanding everything you said when I look back at my efforts there are always areas that could be improved. Which is a polite way of saying they were crap. Thanks for your video, interesting and informative.

Thank you for this clear, informative video with no bs

A few more: -- If a trace is not an antenna and is carrying any sort of signal, never take that line off the ground plane it is over and certainly not take it to another ground domain by going through PCB with no ground layer. Doing this will cause you to radiate RF. -- If you are doing a DC-DC converter, it is common for the engineer to note either on the schematic or in a README.TXT which connections carry the large currents to ground. As much as possible, these points should be connected together by a copper pour in as small of an area as can be managed. This can mean doing a lot of component rotation and moving. -- If the circuit is dealing with very small signals, it is common for the engineer to specify that certain ground vias can't be shared and that other ones must be shared between two parts. A via is a little R-L circuit and can couple signals between sections and the ground plane is only nearly at the same voltage everywhere. Differential signals are done to reject issues but you can bring them back into the circuit with a misplaced via. -- If a current sensing resistor is noted as needed "Kelvin connections" look closely to see that the layout did this. -- If there is a note about clearances for voltages, check that they are obeyed. Some circuit produce high voltages. -- If the board has to mechanically fit somewhere see that it will.

Both AD and TI recommend in their application notes to use a solid ground plane and only separate the circuits, obviously not routing any of the digital signals in the analog section and vice versa. I can't see why I should separate those sections* if located properly and distance is big enough. It's not like fast digital return current start flowing in the analog part of the circuit just to take the path of larg(er) impedance?! Also, routing the digital signals to ADCs/DACs and not having a ground plane underneath would be a big no-no. So *at least* this point has to be made very carefully - and I feel more nuanced than in this (admittedly short) video. I'd be really interested in hearing your take on that. * For precision analog circuits I see why having a solid ground plane (only?) might be an issue, regardless of whether there are digital circuits on the same board/connected to the ground plane. And what about circuits with multiple ("precision") ADC/DACs? Star grounding like on the demo boards doesn't work, ground planes might be problematic as well.

Section 1, to avoid a trace being an antenna keep it SHORT, and the area between trace and current return small. Using a good ground plane tends to work well on the second point. A wider trace is less a problem unless Pico Farad capacitance is an issue.

Very interesting. Thank you very much.

On the common ground return line (the last point you touch) I think the inductance of the copper trace is of equally or more importance than the ohmic resistance. Hence the recommendation to fill all empty space on a 2-layer board with ground conductor. Although basically you still should route each component to the ground connector separately and widen or fill the traces.

thanks for the video, I need more information about the last point about the ground and power planes, could you recommend any resource? I kind of not getting your explanation, I am new.

Thanks for the great tips

Very simple and informative video! Thank You very much :)

Thanks for this informative guide. Ref ground planes and bus bars: please dont forget (and feel free to comment on) use of prototype Eurocards which have pre-defined bus bars. Mind you these were for DIP-n packages (showing my age) but nonetheless are for ground busses.

I usually have a ground plane and the power lines are shaped like a tree with a big branch splitting into many branches. Of course, having both a VCC plane and a ground plane is better but if we are getting into fancy territory, the TRUE analog sensitive circuits have a ground plane sandwich with an array of vias with V+ and a V- traces running between them and then another ground plane sandwich with the sensitive analog signals running between those planes. Two extra layers handling less sensitive stuff are on top and on the bottom. Of course, that’s already a big fat 8-layer PCB and for most applications should be considered overkill.

Great reading, thanks

Great Video, thank you very much! I designed a PCB with an RC-Filter, a Schmitt Trigger IC and a JK Flipflop IC in series, would I still need decoupling capacitors for those ICs? Because the circuit has such a high noise tolerance since it's so simple.

How can you join lets say an analog and digital ground plane together properly? I've seen people do it all sorts of ways. At one point, with a capacitor, with a resistor or with a ferrite bead. Which one is the "best" or which one works better in what situation?

I have seen some boards from highly respected manufactures that have no decoupling capacitors at the chip pins. And these were big boards, about 14in x 20in full of TTL chips. And the average clock frequency was 27mhz. But they did have a solid power layer and ground layer. I guess those layers were low enough in impedance to where no decoupling caps were needed. I was surprised too but it did work fine. Note this product has a 5v, 200amp power supply for the TTL logic chips. * The company was Ampex. A former highly respected broadcast video / audio and military product manufacture.

So I have been through several EMC courses and they all explain that the splitting the ground planes is a frowned upon practice for nearly every design. They usually explain that splitting the ground is used for very special circumstances. And when they do see someone splitting grounds, they usually call them prospective customers since the practice usually causes problems in the design. I first heard of someone going against the splitting rule about 12 years ago from a test engineer I used to work with. He told me that he would always talk to the EMC guys at the EMC labs that design engineers didn't seem to understand that it makes the design worse for SI/EMC tests. I shrugged it off since I was a new engineer at the time. Now here I am 12 years later with this test engineer's remark being validated by several EMC evangelists in the USA and the UK, and from the EMC courses I have taken. Not saying your advice is wrong but it seems in modern PCB design layout and at least from an SI/EMC point of view, it is advice of the past and should be avoided in most designs. Just one EE to another sharing knowledge. Without going through a pay-wall, take a look at Rick Hartley's video on the subject here on UKposts. Other than that, I loved the video and keep up the great work!

Nice. I am currently learning pcb Design. I did not understand your last point. Couod you elaborate? I was told to put ground on every empty space on both layers and add as much vias as possible between them

Good video, and these are all generally rules I apply in my designs. There are some things worth clarifying. 1:12 With a few exceptions, 90° bends are seldom the problem they are said to be (c.f. Dr Howard Johnson¹) and don't cause the manufacturing problems they once might have. They do represent a small impedance discontinuity and, at microwave, form a capacitive parasitic like a bowtie low-pass filter. Those might degrade SI, but the tendency to radiate has more to do with E-field coupling to a trace's reference plane and H-field coupling to the return current within it, both of which depend on the geometry of the whole trace, not just its corners. C.f. why coax fully contains both E- and especially H- fields, and why common-mode currents radiate in a way that differential-mode currents don't. It isn't the shield that stops the H-field, but rather the equal and opposite H-field of the return current that does - and any current imbalance constitutes common-mode current, which will radiate. High frequency return currents tend to follow the path (about 3x signal trace width) in the ground plane underneath the signal trace because inductive impedance is a function of loop area. Ground plane slots force the return current to deviate from the signal trace path, which increases loop area which weakens H-field coupling which promotes radiation. Both of these, along with cross-talk, relate to the fact that energy flows in the dielectric between conductors, not in the conductors themselves. When fields from signals intersect in the dielectric, they couple. Same with power supply noise. Running signals between the supply planes they're referenced to couples noise from one into the other. Another thing that promotes radiation is poor delay matching in differential pairs². These depend on wavefronts travelling together along the length of the transmission line arriving at the terminator at the same time. If they don't, the energy has nowhere to go other than to radiate. Note I said delay matching rather than length matching: all things being equal, these ought to be the same. In practice, the variable Dk of high-resin prepregs depending on whether a trace has resin or fibre underneath it can lead to different delays even though the lengths are the same (because velocity factor = 1/√Dk). In tightly-coupled differential pairs (c.f odd-mode vs coupling impedance), wavefronts need to be paired along the length of the TL as well, which is why any length compensation meanders should be done as close to where the length mismatch was introduced. Nevertheless, I still avoid 90° bends, if only for aesthetic reasons. 2:52 Understanding the role of parasitic inductance is crucial to understanding why decoupling caps are needed, how they work, and how not to apply them. Decoupling caps compensate for supply inductance. Bulk caps can supply large current transients but only work at low frequencies because they have larger intrinsic inductance of their own. Smaller value caps have less intrinsic inductance so can support higher frequency transients, but can't cope with large currents. In both cases, that intrinsic inductance can be made worse by poor via placement and it produces a point of self-resonance, where they cease to be useful as decoupling. To deal with this, sometimes you see multiple values in parallel, which combine to form anti-resonance peaks which degrade the usefulness of them all. The effect of small decouplers begins to degrade from about 100 MHz, and is all but gone by 500 MHz or less³. Beyond that, the capacitive coupling (small as it is) between plane layers provide the least-inductive reservoir of current, therefore they should be placed as close to one another as possible to maximise coupling (as well as to avoid coupling noise). 9:26 As noted by several others, split ground planes usually do more harm than good unless the designer understands how to mitigate the effect on return current paths. For example, if AGND and DGND are split, joined only at the power supply, then return currents between the two can make noise coupling worse by enlarging the inductive loop area - especially if doing so increases noise crosstalk between analogue and digital power supplies because they're run parallel to one another. If in doubt, don't do it. Usually, spacial separation is enough because of that inductance. There are times when it is necessary, but it should never be done blindly and as a matter of course. 10:10 Copper does have parasitic resistance, but that's not nearly so troublesome as parasitic inductance of power traces. For example, a 100mm x 1mm trace in 1 oz. copper has a resistance of about 50mΩ and a self-inductance of 115nH, the impedance of which equals its resistance at just 2.7MHz, above which inductive impedance dominates. ¹ www.sigcon.com/Pubs/edn/bigbadbend.htm ² ukposts.info/have/v-deo/iXdhdaamo2Ogy2Q.html ³ ukposts.info/have/v-deo/sYOmiZB8oXeDsY0.html

A very easy method to avoid these issues is to use slow devices. Nowadays I could get way more power by using ESP32, but I continue using Attiny devices running at puny 8MHz. My boards have all the mentioned design errors, but are working absolutely stable. All my communication is wired, so I also do not have to worry about impedance matching of the antenna. That's the best advice I can give.

Another easy tip would have been to suggest to stay away from cheap components from off-brand companies. Another would be to lean towards ICs that miniaturize your design goals -- such as monolithic synchronous regulators. Another very simple idea is to always over-rate your circuits to be at less than 60% (or less) of maximum loads. Thank you for mentioning 4 layer (or more) boards. I rarely go lower than 4 layer. The value of a 4 layer board far outweighs the marginal cost.

Super sir ji

Worst PCB problem I've ever seen was in an intermediate IF stage on a Mil-Spec reciever. adjacent stages had the emitter bypass "chip" caps in 2 adjacent stages placed so close that the position of the chip on their pad affected the bandwidth of the stages and would sometimes put them out of spec. I was working as a production line tech at the time, and I'm the one that figured out WHY we were having so much variation in bandwidth on these stages (and was pretty close on what I guessed the "between the 2 adjacent cap" value of capacitance was). Board had to be completely redesigned - but the new design worked correctly.

I've made PCBs and forgot decoupling capacitors before... it didn't work... It was too late to add one per chip, because there were about 40 chips on there, so I just added one bulk near the input of the board, and a few noise caps around the board, it did a good enough job to make the board work. I definitely always try and add a 100nF capacitor per chip on future designs.

Useful video

Great video. Everything you say is true and technically sound. However I am afraid it is quite hard to squeeze all the required knowledge plus at least 2 years of experience in a 10 minutes video. But you cover a good part of it.

Splitting digital and analogue gnd planes is a myth. Or at least term too general. Especially for boards with layer count higher than 2 :)

5:30 - I understand the need for impedance to not be HIGHER on the load side of an antenna (to avoid signal reflection), but what if it's lower? Is that an issue?

I would advice against splitting ground planes. It can be done if you are very careful, but usually using a single ground plane with proper PCB segmentation (separate digital and analog zones, think how high speed currents will flow on the plane) will yield the same or better results. And you will avoid other terrible mistakes, like traces crossing above split planes, that can completely ruin signal integrity and cause all kind of EMI/EMC problems.

I am trying to build a replacement PCB for 8 DRAM 150ns chips for the ZX Spectrum. Can I keep it cheap and use a two layer PCB or is a four layer PCB a must? Also, is it a problem to route signal traces below other chips and between chip pins?

An additional reason for matching feedline and antenna impedances is to minimize reflections that can degrade IP3 and other other RF parameters. Additionally, lines going to and from RF mixers must be matched to keep reflected signals from remixing and producing unpredictable spurs, etc. The need to minimize reflections from discontinuous impedances is much more important than the need to maximize power transfer. You might, after all, have power "to burn" and therefore not worry about transfer efficiency. You need to worry _more_ about reflections.

Not sure if I have ever seen mixed signals side by side. Usually that is the primary focus, working on such a board. But incorrect decoupling is so common, even big companies do that.

Traces connecting inductors shouldn’t be wider than necessary? Do t you mean longer than necessary? In the current loop of a switching converter I’d want to make the traces connecting to the inductor as thick and as short as possible, to minimise ESR for the short current spikes. If emitted EMI is an issue, then use more ground planes and vias. Also decoupling capacitors should be placed to minimise their impedance to the power pin AND the ground pin. There are some situations (especially with low layer counts) where you’re better off putting a cap further from a power pin if it means significantly reducing a snaky ground path. Those guys that design complicated single-sided boards (e.g. television power board) must be pretty clever.

Another one is not reading the f. manual. :D I did it too, used a new (to me) smps IC, and it was very unstable. Read the docs then, and realized that one of the traces were too long, so i had to bridge them with a wire, luckily it was only a few prototype boards.

*looks at tag strips illuminated by glowing cathodes* look, grounding is just as important here too! gotta keep all the same ideas, separate signal to power to chassis/safety bonds. some of its utterly different. anything over 1mhz i start calling RF and at that point, things get weird. one thing on optimised component location... traces that wrap halfway round a board when moving a resistor or two can let them take a much more direct route... as i do all my own etching, ive developed a style that i call "inverse traces"... i try to etch the least material possible. if i can lay a PCB out with five straight lines separating solid islands of trace, i will! depends upon the application. um, and one chinese tube amp i opened up... having a cathode bias resistor, big 5W thing, directly on top of a 400Vdc trace. thats ground reference on top of 400vdc... wtf? and when it had been assembled the resistor had crushed the heater wires pulling 3A and elevated at 100V above the chassis against the chassis... tubes shouldnt even be on PCBs. looking at a friends fender one night... shouldnt ALL the tubes be lit up? well, as the socket hadnt been firmly pressed on the board during manufacture, that mm or two of movement when inserting and removing tubes had bust the trace off the board. didnt explain why it sounded so crap. thats simply due to it being a fender! chinese circuit boards are worth studying ;) how NOT to do things! the number of times ive seen components stuck on the back of the trace as the specified ones dont actually fit in the case, etc... like a certain chinese tube amp. why even make a PCB if 3/4 of it cant be populated as designed?

Hi, you've got a new suscriber!

I recently learned that for SMD PCBs associating two or three different values of decoupling capacitors, say typically a 10uF for bulk and 100nF and possibly a 10 or 1nF is not valid anymore. That was only due to the physical size of leaded parts. Today you only need one, bulky enough and engineered for low loop inductance. I kinda fell of my seat: ukposts.info/have/v-deo/sWSDeaORo3toq5s.htmlsi=anLvqldJhhXbNVzC&t=1555 The video linked also so has some other great info on copper fill in the same vein.

Controlled impedances are usually not necessary when the length of the trace is

Robert frank or what ever his name is had a guest on a while ago, and if I remember correctly, the tests he did showed that multiple sized decoupling caps performed worse than a single 10uf cap. He was saying just put as big a cap as possible up until 10uf or something like that.

Everything made sense to me, except the Ground Plane Design tips. More specifically, the return paths part.

It would be nice to know what is considered ’high speed’ as a set of pc boards I laid out never worked properly… the boards had a 1MHz system clock.

One of the most annoying problems can arise from incorrect component footprints. You always want to double check a) that you selected the correct component, especially if there are multiple variants, b) that the footprint you created / downloaded from the manufacturer is correct, if you had to add the component to your library and c) that the component is placed on the board as intended (and not flipped / mirrored, or not connected correctly).

decoupling capacitors are for providing a low inductance power source for high frequency currents (such as the switching of a transistor) they are not for filtering noise (although they could help with this as a byproduct). most people get this wrong. (as a thought experiment ask your self If your IC would still need a decoupling cap if it and its power supply (lets use an LDO) was the only thing on the board and electrically and magnetically isolated from the outside world)

I would call those points you discuss not exactly mistakes, but a lack of skills, experience, workmanship and relying too much on automated routing and placing. Great to point those out though.

3:33 some precision soldering for you

The core knowledge is that any wire - even on a pcb - has a resistance, a capacity and an induction.

The stock footage here is phenominal XD

It was traditionally believed that sharp corners could cause signal reflection and impedance changes, potentially leading to signal integrity issues. However, with modern PCB design and manufacturing techniques, the impact of sharp corners on signal integrity is generally negligible for most standard applications. So don't worry about 90° turns of your traces. It's a non-issue.

Apple Computer’s MacBook designers should definitely watch this video ☝🏼

Decoupling capacitors are used to reduce inductance, as to decouple from it! This is what causes the transient power spikes!

If you need those Power capacitors for any Chip why dont they included in the silicone already

I think you have decoupling capacitors confused with bypass capacitors. Decoupling capacitors block (decouple) DC signals from one stage to another stage of an analog circuit. Great video though!

Noob question... Im sorry I have no basis for this question. Is there a way to noise cancel on a PCB the way we do with twisted pair wire?

Reference creepage and clearances parameters based on voltage which is a European directive and is part of Low Voltage Directive. This defines distances conductors and traces can be together depending on whether it is Mains and extra low voltage (

Good talk but it would benefit from presenting visual examples that actually correspond to what is being discussed rather than generic stock images. For example, in the section about grounds in two layer boards, I was confused that the PCB image didn’t actually show anything to do with problem or its solution.

I'm just a hobbyist, but I've been building and repairing stuff for 30+ years. I've had some arguments online about ground plane stuff. Stating as you did here that ground is not magic. That 0v ref can get pushed around by various current and voltage shunts. Like the prof in the one college level electronics class said. Ground is the sewer, don't count on it for clean water. But some folks really think as soon as you get to ground everything is solved. Not just amateurs either. Quite a lot of pro level analogue gear has ground problems that are solved with internal star grounds, which is tedious. Some of those also have the wrong pin hot on the outputs.

New sub. Please demonstrate with KiCAD these mistakes so people like me don't make them?

I've dealt with some circuit design engineers who were too lazy to add the decoupling capacitors to the schematic. Then they told the engineering manager that they had FINISHED the schematic! They expected me to do it for them. I told the engineer that he would have to APPROVE everything I had added to the schematic. He put them on after that.

decoupling capacitors

If it is bad practice for traces to have right angle turns, then why is it OK for vias in the same traces to go vertically through the PCB? Shouldn't they go through at a 45 degree angle if it is so bad?

Talking about "delay lines" you mention "high frequency". What qualifies as high frequency?

You state that 'metallic objects near inductors' is a sign of poor PCB design, but would this include heatsinks? I never considered that adding a heatsink to hot inductors would effect their inductance. Is this usually a non-issue, or should I consider some consequences before adding them to inductors that didn't originally have a heatsink.

NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD , very nice video. I had a PCB design course and if I was still in touch with them I would definatly suggest this video.

Sir I have designed a big PCB based on atmega2560 in ALTIUM. Almost all pins have been used. Board has been tested well, its work fine. Can you review my board ? The purpose is to get your valuable suggestions and improve my skills for PCB designing.

A handy tip for folk that have to fault find or rework is to make this easy ! .... ALL components that have leads or any through hole contact should have their holes large enough , so that before soldering , with the board turned upside down , THEY ALL FALL OUT , this makes desoldering easy .... TOO MANY designers make holes the exact size so the component is an interference fit , resulting in the through plating being ripped out and ruining the PCB ... also any through holes that connect to a ( copper pour ) ground plane should have a spider connection to stop heat from any soldering iron dissipating rapidly into the ground plane .... ( tried - n - tested ) ...... NOKIA™ design dept ...... DAVE™ 🛑

Thank You, very nice presentation. I recommend prof Bogatin video about bias and groundplanes from teledyne. Sometimes it's enough to have a powerpath instead of powerplane as 6 mills track can sustain an amp of current.

PCB design itself is not taught as a subject in most Electrical Engineering studies and usually its hit and trial and learning from superiors that makes one competent enough. Although the theories are all taught like impedance matching, isolation, filter design, but putting it all together is left to the rookie engineer to learn from the field.

I have to design a board from scratch I think... I have no idea where to even start.

How about use as large a track as possible

My PCB design mistakes tend to be much grosser than there. Wrong footprtints, missing power connections, wrong schematic, and wrongly placed connectors!

0:00 i think we all have mate 99% of commercial PCBs are terrible most people/companies have no clue what they are doing

This video makes you think that you have to be much smarter than Einstein in order to successfully get started with PCB design without making endless mistakes.

Splitting the ground plane feels wrong to me. Why would a current in a well connected ground plane distrub an analog signal in another part of the same system. The only reason ,that i can think of, is for another Voltage Vcc plane .

Very helpful advices. One thing I don't understand though, is those delay lines at 4:30. I am very new to electronics and PCB design, but the wiring at 4:30 looks like something that accidentally will turn into an antenna or something?

Weird order of the mistakes... Why talk about RF integrity and Antenna design before the more basic stuff in the end?

well, you have your schools teaching to copy, so they will copy errors, in every industrial design, if they just "do their work in copying"