holy, im in the beginning of my first “real” pcb project and you have no idea how useful your videos are!!!

Every video you make is massively useful.

SATURN looks like a veeery useful tool for a noobie professional EE like myself. Thank you so much for your content.

Your channel is absolutely amazing for people just getting started out with electronics.... there's so many youtube tutorials that show how to do things, but dont show the thought process behind it like you do. And each of your videos just get better and better 😊 Thanks so much for all you do

You're on a roll with these PCB videos. I just need to follow through with your advice

Few issues also from the manufacturing process standpoint (I have worked as an AOI and ATG technician for some time and saw all kinds of weird stuff): - clearances are critical not only because of electronical reasons, but also in the manufacturing process; especially together with thin traces. Most of the PCBs are etched nowadays and that is a chemical process. The etchant will have trouble reaching all through the copper layer in such a narrow area (it's like cleaning the bottom of a narrow glass with a sponge), so the pcbs may end up with either multiple contacts or broken (even "washed away") traces. This is especially critical when working with thicker copper layers. Usually manufacturer won't complain about it back; sometimes they will correct the design in prep process (change trace widths or even move the traces), which can influence the circuit performance, sometimes he will try his luck and count on some production to be thrown away; he probably won't supply you faulty PCBs, but you could end up with suboptimal PCBs (and most of us don't have the needed equipment to verify that) - the same goes for the trace width; try to stay well over manufacturers advertised width - this is advertising; it is possible in the production in optimal conditions (with fresh etchant solution, freshly cleaned production lines and for the well paying customers); I suspect in most of the cases the manufacturer just copies the specs from the machinery documentation. Thin traces are prone to fail in all stages of production. I have seen quite some cases, when copper "threads" got unstuck from FR4 substrate (got "underetched") - such PCB could go perfectly thorugh AOI and ATG, and even work for some time, but then (seemingly inexpliciably) fail. - "acid traps" - modern manufacturing techniques helped in diminishing the effects of acid traps in PCB designs, but in some cases you can still run into trouble and it's not worthy; most of the acid traps are also clearance violations anyway (from the manufacturing point of view) - "copper writing" - I finish with the thing, which used to annoy me the most: making texts on PCBs in copper (instead of silkscreen)(especially for small letters). It is tempting I guess, but silkscreen is there for a reason. If I simplyfy, "copper writing" are all above mentioned mistakes combined: a lot of too low clearances, possibly quite a lot of "traces" at marginal width and a collection of perfect acid traps - if you really have to do it, make it in "negative" - copper background and letters in substrate (etched through). This all depends very much on font and size used, but still: letters are made to be printed, not etched.

I have been working as an electronics engineer and designer for 25 years. And I love your videos. I wish I had seen them back at the university. Thank you for this channel.

Awesome little video, looking forward to the course!

THANK YOU! Rick Hartley lecture is amazing

Wow, great introduction. Great tips Thanks for sharing your knowledge to all of us 👍😊

Excellent videos man. Really informative and that excellent video suggested on ground. A real eye opener that one.

hey we are eargerly waiting for the course your promised.

Amazing series of videos ♥️♥️♥️

Wonderful Tool, thanks for showing

OMG silkscreens are my JAM

I'd love a tutorial on just how to route things neatly, without needing a ton of layers and all. I'm really bad at routing things!

Looking forward to the tutorial...cheers

Thanks, Phil! Looking forward to your course :D Robert Feranec uploaded a video interview with Rick Hartley. Any time Rick is on, my eyes are glued to the screen haha always have something more to learn from him, Robert, you, and many more. Keep on going!!

this was a great video. Thanks, Phil.

Excellent video. Thanks for sharing

@Phil's Lab / Hi Phil, first and foremost: Great videos! Thank you very much ! Please don't stop making them ! To my question: Could you comment about your choice not to have any copper pours on the front layer ? This is something I am very eager to know!

Watched RHartley's video ... great stuff!

You talked some rare to find golden advices about PCB design. I wish I could make every new PCB designer watch this video. I have one thing in my mind though: If you place via so close to pad, there will be no solder mask barrier between the pad and the via. The via will steal solder from the pad. Isn't this a problem? One other thing: If you "tent" your vias (cover it with solder mask) some manufacturers can perfectly print text on the via. Some still fail though (e.g.; JLCPCB still can't perfectly print text on tented via).

Excelent Video.. Thanks Again.. Waiting for the course. =)

Hi Phil! I recently came up with your channel. It is excellent. I would like to know: What are the dots separing the power planes? vias? is there a reason for you to place many vias between the different power planes? Thanks !!

Awesome vid!

Great videos! Unfortunately most links to references you mentioned in your video are missing in the video description.

5:49, I noticed that you place vias crossing into the "courtyard" boundary of the components. I didn't know it was OK to do that! Some boards even have courtyards printed on the silkscreen. I like the idea of close vias but if we do that, then we also need to make sure the courtyards aren't on the silkscreen, right?

Thanks for the vid. I'm actually confused about the crystal oscillator placement and via's around 8:50 in the video, so I have a question about it. Most vendors explain that crystal placement should be as close to the IC component as possible and have a few ground via's at certain positions. You could have definitely moved it much closer, but then you wouldn't have been able to put the nice looking ground square around it to protect the component from interference. You could have also put more ground via's around, or even between the traces - but apparently chose not to. Should I interpret this as "the signal integrity around the oscillator is more important than the signal integrity of the traces the transfer the signal"? Could you explain this design choice a bit more please?

Placing via really close to the pad can create soldering issue as the heat is absorbed by the via to the inner planes

Hi as you said we have to good spacing between traces it's a question for me if i have good space between my traces but i fill this space with ground plane can make crosstalk or noise?????

I learnt a few things... thanks!

How did you determine the via spacing around the edge of the board? How did you determine the via spacing between the analog and digital sections? Why did you put vias around the board and the "partition" between analog and digital?

Hi Phil can you explain spark gap in PCB and how can we design spark gap in altium PCB? Is there any special technique to design this spark gap?

Really good video!

With all those vias I imagine the topic of avoiding ground loops must then come more into the forefront of the picture, especially when it comes to analog circuitry. I hope this topic is at the very least touched on in further ground plane (or ground layer) discussions as its an exceptionally easy trap to fall for.

Could you tell us how you did the exposed copper fence around the PCB?

Phil, I'm interested to learn about how a PCB heated print bed for 3D printers is made, how they make them dual voltage etc. Are there any resources you can point to for figuring this out? Would you consider making a video about designing a custom PCB heated 3D printer bed?

Excellent tips- thanks. I've always wondered about via size. How large (diameter) should a via be and why?

Hi Phil, how would you run a signal trace from an analog section to a digital section? For example, lets say you have an analog signal that goes to a voltage set pin of a dcdc switching converter, how can you run it across both section and maintain signal integrity?

@Phil's Lab Hi, I am quite new to PCB design. I want to add a female 4 pin header to my board so that I can connect another part later. But I want to place them at 180° (parallel to the board) and not at 90° so that I can connect from the sides and not from the top. How do I do this? Thank you in advance for your help.

Sir, what is the best width for signal traces, for 1oz copper?

Which one is better? 2-player pcb with thicker and wider traces or 10-player pcb with the same squre area of the total traces?

6:03, My manager (principal electronic engineer) says I shouldn't have vias within courtyard, opinion on this?

Saturn PCB Design Toolkit looks great - unfortunately, it is available only for Windows (I'm a macOS user). Do you have any recommendations for a similar web-based toolkit or a mac app?

Are you familiar with testing by injecting frequency and voltage, to measure isolation? What are the basic hardware tools or methods needed to check our PCB designs for isolation and cross coupling, when they come back?

Cool video :)

Great video! At then end of it, I saw those weird snakeline traces. What are they for?

Damn I wish Altium had those calculators in it, for the price you pay for it. I like Altium because the graphics appears smoother and not as harsh as the others. Anyway my main issue is the heat-sinking pads hope you put that in the course.

Hi thanks for the video, I was wondering how would you go about crossing signals between different voltage power planes for example if I need a signal to cross from a 3.3V to 5V power plane how is that achieved?

Hi Phil! Which track width would you recommend for a signal trace from a mcu (virtually no current), to be produced at JLCPCB?

How do you route every trace as 50 ohms if you need like 10 mils trace width near an IC?

for 50 ohm impedance , how are you deciding which frequency to base your measurement on? for instance, in your example you have 500mhz. are you assuming your signal trace could go up to 500mhz? or is this calculated based on each signal application?

Kicad has also a built-in calculator for some trace properties, but not as many as Saturn PCB‘s. What use has the structure around the edges of your pcb?

Where do you get your footprints/symbols/3d models from? The 3D models look much nicer than most I've seen!

I love the discussion about not splitting the ground plane. One thing to watch our for is ribbon harness connectors in the middle of a PCB can inadvertently create a mote in a ground plane. One thing I think is really important is connector placement. Besides not locating a ribbon cable in the middle of a densely wired PCB, try to locate all cable connectors along the same edge of a PCB if possible. Currents in the ground plane can cause radiation out the cable shields. Get ready to add ferrites to your cables if you are unable to follow this rule.

Hi Phil, can you tell me the specs of that ferrite bead that you use on positive rails? Thank you

I followed your advice and downloaded the Saturn tool. I think it's in Chinese; I can't figure out most of it.

Could you talk about bluetooth design? Chips like rn4871 have very low power which makes necessarry to design your own antenna, the design of a case is also important

hey everyone, what about those sinusoidal traces that we can see on 3:20 and on 8:42 , when are they used or considered on design?

Is it ever beneficial to have a track width that is bigger than the pads that it is going to for a load net? For example, a point to point track between a LDO regulator and a QFN MCU pin, would it ever be beneficial to use a track width that is bigger than the QFN pin?

hows saturn compare to fritzing?

when course? love u

Why is it a bad thing to cross signal wires over the power planes? Some designs that rule is absolutely hard to achieve

Hi Phil, I would love to be part of your PCB course :)

Good stuff. I watched the Rick Hartley video too and learned a lot from it. I never even considered signal return paths before that! How important do you think track spacing is if you have an uninterrupted ground plane on an adjacent layer? I have been working on some boards which are quite constrained for space but have a lot of digital signals so I don't have room to spread them out. (pcb is here if you want to see what I mean imgur.com/a/63cPk7v )

Hello... Design of a any board with fpga?

Please come EMI/EMC videos for pcb

6:40 How to achieve proper grounding: ukposts.info/have/v-deo/sYOmiZB8oXeDsY0.html

Do you offer design services on places like Fiverr or anything?

Can I purchase your course from india ? You could also release it in udemy .

That's too much information to absorb.....kudos to you man

Dude, do you still play guitar? there are some kick ass covers on your channel

Please put your course on Udemy platform.