How does one achieve that? Can this be done by configuring the scl pin to push-pull while configuring the master‘s pins?

@@xslr yes, that is correct.

Sounds kinda sketchy. What happens when it goes out of sync and two devices pull in opposite directions? Edit: Oh I see, you meant just the clock line, not the shared data line. Still, the I2C standard lets device pull the clock low (“clock stretching”) until its ready to respond. You can only skip that resistor and drive the line high if you’re sure that the device doesn’t do this. Otherwise, your pin will release the magic smoke.

@@NavinF Ya I just mean the clock line and I hadn't heard about any clock stretching parts until you mentioned it.

Well then I'm sitting next to you in class bc don't know what's going on either but I know I like it.

When using totem-pole drive, where the chip has strong drive both high and low, you can't connect two outputs because they would fight. But I2C uses what is called wire-or. The resistor is not strong. It represents a weak pull up. So when the master (normally a microcontroller) sends, it can override the resistor and pull the wire low. And when the other side (sensor, memory or whatever) responds, the microcontroller holds its pin in idle (allowing the signal to float high) and the other side is free to send by pulsing the wire low. So many senders can share the same wire to transmit as long as there is a protocol to decide who may send at any specific time. And for I2C, the master supplies an address in any query, to inform the specific device the to process the query and respond with an answer.

It depends on the capacitance of the bus and the signal rise times (bus speed) you need to hit. In the end, you would try different values and scope the lines to see if you meet the desired rise times.

Adafruit and SparkFun generally do on their sensor breakout boards... usually 10k and 4.7k respectively if I recall.

Because I2C bus is meant to drive multiple sensors, so if each one has its own pull up, the parallel pull ups will be too strong the the open drain of the bus master.

Ok perfect, thanks for your answers.

@@GaryVolts Open drain just means the output has no capacity to draw the signal high. It doesn't tell what capacity a pin has to force the signal low. Open drain (FET) or open-collector (bipolar) is implemented with a single transistor between signal and ground. No transistor from signal to supply voltage. But most chips can sink a lot. Just that "a lot" also means extra current consumption. Which is bad if the device is run on batteries. So the goal is to use as big pull up resistor as possible that gives acceptable signal quality - not because the chips are too weak to sink the line but to reduce the power consumption when the line is held low. 3V3 supply and 2k2 resistor means about 1.5 mA consumed just to hold the line low.