Amazing! Probably the only tutorial so far that explains RISC-V Vector Extension in so much detail.
@MichaelMaitland-yi1gqРік тому
Thank you! Explanations and examples made the vector extension digestible, compared to reading the spec directly.
@Bonkers1235 місяців тому
Thank you for your insightful video. Is the power point slides available somewhere?
@oajugade89172 роки тому
Could we get the pdf used in the tutorial?? That would be great!
@santoshkandagave9184Рік тому
Are tools/ IDE are free for users to download and start prototyping few RISC-V ISA based intrinsic examples? for NX27V architecture
@gayathrigp8123 роки тому
How come the programmer knows that 512 is the maximum VLEN this architecture supports?
@masonhsieh55833 роки тому
I believe you'll need to check the spec. The concept of RVV that Thang brought out here can be applied to other size of VPU. At 35:00, Thang mentioned that the VPU he designed for Andes product has the maximum vlen of 512b.