Yay! That's good news.

hello. and in your first lesson on the site ("Tutorial: Your First FPGA Program: An LED Blinker. Part 1: Design of VHDL or Verilog"), where do you connect the frequency output? could you tell us more about how you perform frequency division in this example.

Thanks Russell!

this is the best news of the decade

Congrats, great work

They did the same with ispLever a few years ago. I can’t believe they wanted to make people pay for the garbage that is iceCube2…

FPGA design software is still a joke in year 2024, no matter if it's from big players (Xilinx/Altera/Lattice) or lesser known like Efinix. Every single one FPGA manufacturer has this stupid license requirement that can change at any time, because they know there are no alternatives. And Lattice actually proved this can and *will* happen eventually. I have a Lattice Diamond project designed for the MachXO2 and I'm now concerned that I might some day just lose any ability to work on it. I still need to renew "free license" for Diamond every year. I really wish they were forced to publish all relevant documentation so free open source software could do better job than manufacturers. Not to mention Diamond being so bad and behind any other tool that doing any timing analysis is the worst nightmare. Yosys and everything around it is very promising but it obviously doesn't support anything less popular. I can just imagine how hard is to reverse engineer bitstreams for every single new FPGA family. Huge kudos for anyone who's doing this without documentation from the manufacturer.

Hey! Nice to see a new video: really enjoying the book- I’ll leave a review on Amazon pointing out that the IDE is free again. I’d love to see a video on what you think of the current state of the embedded/fpga industry. I’m trying to break in- are companies hiring novice FPGA programmers? Are you currently still working professionally in FPGA work?

@nandland You might want to document the use of the open tools (Yosys, nextpnr, icestorm) for your book as a solution. I personally find it easier to use than the iCEcube2 software. It is very mature for the iCE40 lineup of parts, I did several production projects with it. There was no need to even consider using iCEcube2 as far as I am concerned, especially because the open tools can be used as part of the CI system.

What about a updated f4pga tutorial due to the occasion? Close source tools (even when temprarily at no cost) always have this risk, that is why I am so pro open-source...

I’ve had great success with the Yosys tools on my iCE40UP board. Not even looked at the proprietary tools. I’m sure there are some disadvantages but for my moderately complex projects Yosys is fantastic.

Good news. Thanks for the update.

Lattice lost my trust....

Ура!

It was such a stupid move to charge for the software. I'm sure they started to see orders for their devices dry up. And so many students would become familiar with Xilinx or Altera instead so they would have lost future orders

You could always use OpenSource solution like Yosys

Thank you!

Damn..the channel is still alive

yay fpgas! how to wip a gpus ass.

Stack = first in , first out

Well done video, it took me about 20 minutes including loading up the tools to get the first bit of Verilog code working. Thanks!

If you need a license for iCEcube2 email me [email protected] with your MAC address and I'll get you one. Lattice changed their license form. Sorry for the inconvenience!

Amazing courses, amazing board and amazing book! The IceCube2 is no free anymore and this is insane :S Russel, I've emailed you with my mac, please drop some response when you got a sec! Thanks for everything you do!

I'm missing new content from you Mr.Nandland! You are the best teacher I've ever seen for all FPGA-related topics. Please consider making more youtube videos! I bought your book btw.

Right now, im really mad at that guy who told me "analog computing is the key to sentience in AI", because here i am: learning about FPGAs for the first time in 2024. 🥲

Good overview ,particular with the examples. Looking for forward for FPGA vs Micro processor

I am working on the project where I have to setup board to board connection using PMOD Bluetooth module with basys 3 board can anyone tell me how to approach this.

Dude you’re awesome

How do you know which logic gets precedence? Is it always "and" or is it the first logic operation from the left?

I like others can not cinfiure serial port for teraterm, serial port grayed out, when I try form main menu says, no serail port, googled but haven't found anything yet? didn't see any responses to others who had similar issue?

A FPGA does not have the RS232 voltage buffer!

To help anyone else who runs across this issue: I had to remove the reset logic to get the transmitter to work. For some reason, the reset logic made the synthesizer think the entire transmitter was unused, so it removed it all.

Amazing videos! Thank you so much! Go board was the best purchase for me to learn about FPGA

for those who have a faint glowing led2,3,4, you can disable the leds in the code for vhdl, as an example led2: declare in the entity: o_LED_2 : out std_logic; and in the architecture: o_LED_2 <= '0' ;

Verilog prof: VHDL is trash VHDL prof: Verilog is trash

Thank you!

"Mr. Slave" 🤣🤣 I could tell you were holding back the chuckles for that South Park reference lol

23:11 For anyone who just wants the VHDL part

Best explanation ive seen so far :p

Another disadvantage of FPGA is the heat generation (due to high power consumption). If you want to build a compact prototype (product), it might get pretty hot and will reduce the lifetime or even shut down in warmer environments.

Great, thanks!

Thanks for this, I miss your videos also

Thank you for all that you do! I am learning incredibly soo much from your videos and I will definitely grab a book from your web :)

Thank you for this - I'm trying to get my head around I2C for an enhancement to an existing project (sending data to a PIC) and I have no idea where to start! This is an excellent introduction - thank you.

9:44 ; does not terminate but separates,if it's the final entity there is no separator needed - like in Pascal Vs C

You’re awesome

Dear engineers, I'm new to FPGAs, I bought a Nandland Go Board to learn hardware programming and do a project that requires connecting a camera to the board. The first thing I struggled with was finding a camera I could use with the limited ports available on the board. Can anyone help?

Dear engineers, I'm new to FPGAs, I bought a Nandland Go Board to learn hardware programming and do a project that requires connecting a camera to the board. The first thing I struggled with was finding a camera I could use with the limited ports available on the board. Can anyone help?

Strangely I get two COM ports in device manager when I plug in the go board.

i think you made a mistake on the sram dram part. i thought sram is faster than dram because sram uses transistors primarily for storage rather than the capacitive storage that dram uses, which takes time to charge and discharge.