B+ tier pun! Just like my segues

I see what you did there. And I like it. 👍

*Now :D but love the pun :)

Well, some of Valve's patents for a standalone VR headset and some of their code for dev branchs of SteamVR and SteamOS include mentions of a Arm chip. Besides indices that Valve is going for a dual chip system like the Apple Vision, but with a x86_64 chip instead of the M2, said code lines implies that there maybe be a Quest like mode where the OS could run from the R1 equivalent Arm chip. Which alongsides the patents about modular VR headset is why @SadlyItsBradley thinks that the x86_64 chip may go in a removable module. Add to this that due to more datamings Bradley suspects that Valve counts making non VR games and software works in a VR/AR environment a bit like Apple marketed mixed with the Game mode/Dektop mode approach of the SteamDeck to attract newcomers to VR by extending on the "same portable screen" aspect. (In a "first get people to use flat screen app in a VR environment, then get them to use full VR apps" strategy.) If Bradley is right on his theory, and depending the functionality lost or conserved in the 1 chip mode (which would be a Arm chip), Valve might work on x86-to-Arm translation layers.

proton by steam?

Socketed Arm CPUs ftw!

There's no good reason they shouldn't be. I know when 3D stacking starting becoming a thing, intel tried to push soc style motherboards which means preconfigured cpu/ram, etc and no upgradability/reparability. There was a lot of pushback for that. In a twist of events, that's exactly what Apple Silicon is. Unrepairable arm soc's.

@skechergn You mean "Going back to blade socketed CPUs" right? Pentium 2 and early Athlon chips came on a board and some had dual sided cooling

​@@JeffGeerlingTry using Box64 to run X86-64 on ARM.

​@@lionelt.9124yes, was also just posting about box64 box32 x86 to arm wine

Ah, that would make sense. The old UI would work a little better if you disabled GPU acceleration, but now it seems to work just fine. I wonder if moving to electron might make the transition to arm64 easier, too? I can't imagine Steam will remain X86-exclusive forever!

Steam use their own browser-based desktops framework

The browser in steam is a custom build of Cromium, the presentation layer is Electron which is compiled into the client.

@@JeffGeerlingthey have hired the gal who has been working on making Apple’s M series GPUs work on Linux. So possible they want her expertise for ARM based gaming

much better?? my man we live in two different worlds. Steam performs like shit to me, granted i am on archlinux

Haha so true. Like I said, it's not what I'd call "good" code. I still subscribe but only because of 25 years of muscle memory from back in the Photoshop 2.5.1 days lol

It's not about being competent, Apple simply added a few private extensions to the ARM chip for operations that the emulator has to run a lot. This is a luxury Microsoft can't do, since they don't produce their own ARM chips.

​@@anlumo1but if chip makers like Ampere would do it, I'm sure Microsoft would happily support it

At least right now, Lightroom and Photoshop work natively. But they have 20+ apps, so 10% of them being native isn't very promising. Imagine trying to drive Premiere via emulation.

@@anlumo1 'This is a luxury MIcrosoft can't do', really? Microsoft has money than god and even sold their own ARM machine running windows! Microsoft could absolutely do the same thing but they can't help themselves and must always half-ass everything they do. Microsoft just doesn't care.

This 96-cores Ampere Altra is based on Neoverse N1 core which is derived from Cortex A76 (2018). It's 5 years old core however it has an IPC of Intel Skylake / AMD Zen 2 which was on par with top x86 architectures. However A76 core has consumes only 1W at 2.6 GHz while area is 1.4mm2 on 7nm TSMC so resulting in incredible performance / watt which shines even today. Ampere uses maximal configuration with 128-cores what N1 platform can provide. Similar CPU from Amazon the Graviton 2 used 64-core config. FYI today last Neoverse V2 (Cortex X3 based) platform has 19% higher IPC than Zen 4, it supports up to 512 cores per socket (256 cores per chiplet) and has suport for revolutionary SVE2 length agnostic vectors (up to 2048-bit). Nvidia uses V2 in 144-core Super Grace. Amazon will use it in next Graviton 4 I guess. Surprisingly Ampere next gen should be their own developed core Ampere One, leaving ARM's Neoverse license. BTW new Cortex X4 has 33% higher IPC than AMD Zen 4 ... however next server/workstation Neoverse V3 should be based on Cortex X5 in 2024. Basically AMD Zen 5 is dead on arrival because it cannot beat X4's IPC not speaking of X5's IPC. Apple M2 has 56% higher IPC than AMD Zen 4. Yeah, Apple is king of microarchitecture since Jim Keller's 2015 A9 Twister core release (IPC higher than Inte's Skylake). *IPC = Geekbench6 ST pts / GHz

Exactly. If Apple just sold their systems as open instead they would have a much larger market - but alas they do love their Apple store revenue so it will be a cold day in hell before that happens.

@@wizardkoer782 It's not locked to Snapdragon. There is a build that runs on Raspberry Pi too.

@@richard.20000 "Similar CPU from Amazon the Graviton 2 used 64-core config" Zero point talking about a CPU only available for cloud instances. "Apple M2 has 56% higher IPC than AMD Zen 4. Yeah, Apple is king of microarchitecture since Jim Keller's 2015 A9 Twister core release (IPC higher than Inte's Skylake)." And yet Genoa is not exactly taking a beating from Apple's highest end chip. There is far more to performance at the higher end than just single threaded IPC. "new Cortex X4 has 33% higher IPC than AMD Zen 4" Says who? There isn't a single implementation of X4 in the wild yet and cache size affects core performance significantly from what we have seen of ARM claimed figures with ideal cache size vs Qualcomm Snapdragon implementations with reduced cache size. "Basically AMD Zen 5 is dead on arrival because it cannot beat X4's IPC not speaking of X5's IPC" Utterly pointless remark considering that potential IPC advantage would be eroded simply by running x86 software for anyone needing legacy support (which is a HUGE part of the industry like it or not). At this point the IPC gains of ARM are slowing generation by generation as they run into exactly the same problems as x86 ODMs suffer in design - in another 5 years the situation will be pretty much neck and neck. ARM was better in the lower power region - but as it scales it is running into a wall, this much is fully evident to anyone looking at actual performance figures and power draw. "and has suport for revolutionary SVE2 length agnostic vectors" It was revolutionary a decade ago when they published the ARGON experimental variable length vector instruction set. These days it is just an implementation of an idea already taken root in at least one other architecture (RISC-V) and implemented in Fujitsu's ARMv8 based supercomputer Fugaku years ago - Fujitsu actually co developed the original SVE with ARM.

@@richard.20000 The thing is, the ISA doesn't really affect the performance nor the power consumption. The whole CISC vs. RISC thing is from the old days and doesn't matter much now. As for that claim about the Cortex X4 having 33% higher IPC than AMD Zen 4, we haven't seen any real-world implementation of the Cortex X4 yet. So it's hard to say how it will actually perform plus other factors like cache size can impact core performance, so it's not just about IPC numbers. Today IPC is "how well you are able to keep the core fed" which can vary a lot from an µarch to another Saying that AMD Zen 5 is "dead on arrival" because it can't beat the hypothetical IPC of future ARM cores is kind of pointless. There are a lot of software applications that still rely on x86, so running them on ARM would be a challenge and need and may affect performance depending on the implementation. Compatibility also matters a lot in this segment. And the support for SVE2 length agnostic vectors might sound cool but it's not as revolutionary as youm think. Other architectures like RISC-V have similar concepts already. It's not a game-changer anymore.

afaik there is also fex for linux

I hope he sees this and gets on that!

This! I remember folks trying out proton with box64 a while back. It would be interesting to see how it works here, so we can compare performance of modern games on it

Also I guess QEMU can do it ?

This. Just quick google search away, poorly research on the linux side as usual here.

Though for some reason on Linux monolith was doing well compared to quadrant... I know Anandtech did a lot of testing though on Ampere, Epyc, and Xeon, and found some interesting differences (all are tradeoffs, but some work better than others depending on the workload).

@@JeffGeerling That is pretty interesting. I should specify I'm not an expert on parallel stuff, I've generally worked at the individual core level, and I definitely am not a software guy. So I'm totally speculating here, but my guess would be that going Monolith allows the scheduler to be a bit liberal and play around with crossing neighborhoods when it determines it's worth it. This is something I could definitely imagine Linux being better at handling than Windows for ARM. Though again, if someone who actually knows about the Linux scheduler wants to chime in and correct me I'd welcome it.

​​@@JeffGeerling I think the Linux scheduler does a bunch to try to avoid cache thrashing. It may actually switch the CPU out of monolith mode (if this is possible) and go about trying to schedule based on cache. I know more than nothing about the Linux scheduler. But I'm far from an expert.

@@JeffGeerling Just checked out the Anandtech article, (I'm currently on vacation so I don't have the time to really dig into understanding it so I'm again sticking the "speculation" disclaimer on this comment) but it looks like Ampere's mesh is really slow when it comes to multiple cores within the same quad trying to share a cache line that exists in another socket. Specifically, this is the line I'm referencing: "and the aforementioned core-to-core within a socket with a remote cache line from ~650ns to ~450ns - still pretty bad". This can slow down Monolith mode if the scheduling system is unaware of this. As for quadrant mode, going quadrant mode seems to segment the SLC (system level cache) evenly between the four quadrants (so each quad only gets 4MB of SLC). Instead of allowing it to be shared between them. This means for workloads that don't use all the quads you're losing a lot of cache potential and having to go out to main memory much more often. Edited to clarify a couple things.

@@JeffGeerling Sorry for the comment spam, but going off the comment by @Omnifarious0 I'd wager that in "Monolith" mode the scheduler is still trying to keep things within the quadrants, but since Monolith mode opens up the cache you can stay on chip way more. Windows probably struggles with scheduling threads to avoid remote (off quad) cache line accesses and that's why it suffers compared to Linux in Monolith mode despite the unsegmented cache.

This and companies always locking down their ARM products so you can't run any software or operating system but they one they approve of. People keep saying "NoT aLl CoMpAnIeS" without stopping to think that no one with any weight is bucking the trend of locking down the hardware. It's all find and well to buy these Chinese SBCs and super expensive tech demos like this one, but for the consumer who doesn't have the money to burn on a 158293 core whatever ARM CPU we're going to be stuck with locked down and unsupported hardware.

It's not that, even risc v will hit exact same problem, it size of market that is the problem, there not much demand. Desktop ARM on Linux probably would not be as much as develop if not Raspberry Pi.

problems these days...apple lost interest in RISC and with windows still majority of x86 platform...there is no motivation for devs to go back RISC era again when it was not very fun for any devs during 90's to 2007...but it was beneficial for apple and pc system when they optimise for it but its time consuming to do and bad ports are constant problem back then ...now everyone using x86 cpu for lazy approach in game engine that does everything automatic compiling vs manual compiling on risc architecture is not very user friendly even though it does have more control in raw performance in utilizing the cores better than cisc automatic approach compilers that does not give users complete control of cpu cores ...its too generic method that like under linux compilers ...devs have to choose which version for software it run on type of cpu?? type1 to type4....majority don't have type4 when type2 is very compatible for all x86 cpu from 1995 to 2023, its logical how they compile on ...

@@ivankintober7561 ???? Modern Apples are currently on RISC architecture. M1 and M2 chipsets are RISC.

Yeah, especially now that the relevant specs are being finalised and added to RVA23. I’d expect RISC-V to go mainstream in a few years, at least on smartphones.

I've also heard that box86 (and box64) does a pretty good job running Steam.

Box86 or box64 would be the better option these days IMO

It would be super exciting to see Steam under Box86/Box64 in the next video! It's a bit of a hassle to set up, but should give you a very competent translation layer.

You know something is good when even Torvalds says he's using it in the release notes. Marcan never disappoints 😎

No idea what the gaming performance is like but you can use QEMU User space emulation to run programs compiled for another cpu

Well if you want that, but more insane, the Dev Kit is a fun upgrade, if a little pricey, and it uses a bit of power at idle :O

How good is it?

update us

@@Dave102693 the windows dev kit has been kind of flakey. I had it shut off a couple times when doing something processor/graphics intensive. I tried running Portal 2 just to see how bad gaming performance would be on a translation layer and I had the system shut off a couple times.

@@XeonProductions Have anyone got Linux running on it? If so try running games with box86/64 or fex, Windows x86 to ARM translation is so bad it loses to both of the Linux translation ones. If Linux is not ported yet try to run Wine within OpenBSD with box86/64 if it's even possible.

And if the application is not NUMA aware then it can potentially be limited to a single “quadrant” at the OS level with processor affinity / pinning. So you might end up running 4 copies of whatever app, one per quadrant, or assign some other workload to another quadrant. I don’t have a lot of experience here so I’m not sure how that works for memory allocation. Thread affinity is easy, though, and I’ve used core pinning on Windows and Linux to avoid L3 misses on multi-CCD Ryzen processors.

@@JJfromCowtown When it comes to Zen (except 1st gen Threadripper/Epyc), you shouldn't need to do thread pinning. These CPUs present as a single NUMA domain and the scheduler is supposed to be L3 partition aware, such that it tries to fill one CCD with threads of a given task first before allocating ressources from the other one.

@@Psychx_ , I agree that’s how it is supposed to work. In practice, both Windows and Linux schedulers will move threads related to gaming tasks from one CCD to another, leading to stutters. I observed this on Zen 2 mostly, with a 3800X. Limiting games to the second CCD improved min frame times. Maybe the scheduler tries to limit to one L3 domain/CCD but there must be more to it that I don’t understand.

@@JJfromCowtown I'm using a 5900X and before that a 3900X. There have been changes regarding this in the latest kernels, plus distros tend to configure the scheduler differently (i.e. by setting CONFIG_WQ_POWER_EFFICIENT_DEFAULT in the kernel config). All I can say is that it does work as expected and respects L3 cache partitions when configured correctly. Btw, I'd highly recommend using the BORE scheduler for Linux gaming. It delivers much better frametimes than stock CFS, while being simpler (simple is good, fast execution of scheduler code and less breaking changes by upstream) than ProjectC/PDS (another great scheduler replacement with a different, more complicated approach).

@@Psychx_ thank you and I will try that in my Linux env. I am on a single CCD these days (5800X3D) but "free" performance is worth chasing. Given all the talk about big/little core scheduling issues in Windows (particularly in Windows 10) I have always doubted that optimizing for L3 mattered much to the scheduler in that environment.

Not to defend Adobe at all, but... ctrl+s my guy. No software crash should ever lose you more than about 2 minutes of work. Ctrl+s. Lol.

@@clonkex all adobe stuff has auto-saving functions, no need to bash keyboard every 2 minutes like a caveman. Still does not save you if it decides to corrupt the project files though

@@marcogenovesi8570 I don't use autosave (unless you mean the automatic background recovery saves) because I prefer to control exactly what gets saved (so I don't save the file with some half-baked experimental changes I don't necessarily want - because of course, if it crashes at that point, I can't undo). But honestly I've rarely seen crashes. Maybe once, twice at the absolute most, in over 8 years of using Photoshop on Windows for my daily work. Then again, maybe you're using InDesign or some other product I'm not familiar with.

I really wondered why It was not showed in this video.

Jeez

Oops! I thought I had double-checked that, but nope.

​@@JeffGeerling From the bios option it sounds like this option splits memory access into 4 NUMA nodes. It's essentially like having 4 memory controllers each allocated to their own ram sticks. The access to memory that is outside the cores reach(so in a different NUMA node) is costly. This can also have the effect of reducing the number of channels on a cpu. With 8 sticks of ram installed, this means that depending on the memory controller, this could drop the memory access from a 8/4[which should be the case on a workstation such as this one] memory channel per numa node(with a single numa node) to just dual channel. Effectively dropping memory bandwidth by a magnitude of 4/2.

This! Was looking for this comment! :)

yeah, also search if anyone was already posting, it. Some more information: I used it more from a x86 site but should also work fine for the other side. The nice thing with binfmt is, it only emulates userspace, syscalls are handled nativly by the kernel. Only problem is to get all the x86 binaries, there you ether need magic `dpkg --add-architecture amd64`, a chroot lxc / docker container, or use nixos with `pkgs.crossPkgs.*`

Easier to just use Box64... And probably faster.

Okay

It's been there more than a year... check mi pad and other Android phone run windows games for last one year ok windows 11 arm

Someone needs to ship me one of those server RISC-V chips to mess with :D

Box64 has a higher performance than quemu

@@larsradtke4097 yup, less target though, point was, linux can do it :)

Yeah, Windows on Raspberry has been pretty cool to see, and it's conceptually similar, though the best thing about the Ampere setup is the normal installer can be run without modification since the system has UEFI and doesn't need special boot stuff in the image.

And (though I'm no fan of Oracle), they just certified Oracles DB software for running on Ampere.

Wow great job! Have any manual? I tried to run using qemu but nothing boot.

I am doing much better now! The operation was a total success, and I'm so glad I did it.

Exactly, would've loved to see Apple find a way to at least give upgradeable RAM, or at least put the SoC on a carrier like COM-HPC or even something proprietary so it could be upgraded.

Unfortunately, Apple can only get the performance it does by tying everything together so it cannot be upgraded.

No, didn't try that, but something else to add to the list :)

Yep, still plenty more to test!

I hadn't tried that, but it's on my list now.

It's not a bad price for high-end workstation or server parts, but it is definitely not cheap, either! I hope Ampere is around for a long time and can slowly roll out more on the desktop side, so we can see more Arm options there.

There's more platforms coming from ODMs that would suit non data centre uses.

This is but one of the many reasons I tell people to subscribe to you ;)

If it’s hardware supported, then it’ll finally work properly

The integrated aspect of the M series macs actually improves the perfomance for those chips. ARM is incredible memory hungry (bandwidth and maybe size) vs x86. For x86, slower memory doesn't hurt the CPUs that much (cache layout, complex instruction sets). The IPC of the ARM CPU above is incredibly bad even when you take native compiled games vs x86. The M2 chips are like several decades ahead.

Like the guy above me said, Integrated RAM or SoC / SoM benefit the performance greatly, hence apple M1 / M2 have a great performance, but it will come with a pricey chip and not upgrade-able unless replacing the whole chip

It's an older CPU, sir, but it checks out!

I took a quick stab at getting that up and running but had a couple issues. I may take more time to test it later!

​@@JeffGeerlingFEX should also be pretty good :)

@@erikreider yeah, that's the one I couldnt remember the name for

x86 and ARM pretty much represent two ends of the spectrum of CPU design philosophies: CISC and RISC respectively. CISC provides you with a large library of features built into the CPU, at the cost of poor efficiency because many features go unused but still need power and space. RISC provides you with a simple, minimal but extremely flexible built-in set of features, and expect you to build the rest of the features within software as you go. However with modern compilers and improved automation tools, optimisation isn't nearly as much of a problem today as it was 30 years ago. The only reason x86 feels more easy to optimise now is mostly that it benefits from 30 years of consumer-oriented optimisation, whereas ARM has until recently been mostly focused on industrial or mobile optimisation. The real issue is that the market for ARM is very fragmented. Because the ARM company allows you to make whatever customisations you desire to the chip, for a fee, not every ARM chip is guaranteed to behave exactly the same. Applications that stick purely within the CPU will work fine, but anything that interacts with external hardware e.g. graphics may run up against unexpected quirks of specific models or manufacturers.

Yeah, Rosetta would be amazing, but AFAICT it has a lot of M-series specific instructions that would not work on other Arm chips.

Although now I wonder if you could run Rosetta on some sort of emulation layer itself...

@@JeffGeerling If I remember correctly I don't think it does, not in the linux version. But don't quote me on that. Even then, I have no idea whether it works with different page sizes though. I guess the only way to find out is for you to try it. Or for you to ask Hector Martin.

Yeah, and the Ampere Altra Max's single thread performance is only on par with older desktop CPUs, so that makes sense. I have yet to see if the new AmpereOne CPUs have better single-threaded performance. The Apple M-series chips really shine there.

I agree. I also dont know if windows translation or box86-64 is further along in terms of compatibility and performance

What if they realize it's stupid already, but they choose to do it anyway? 🤔

Given M$'s track record, they'll do whatever they want...

This is why they say, Windows is a great OS--if your time is worth nothing.

I can’t wait for the day it’s possible

​@@BintloaftheMightythanks for your permission 🙏

1995 was 28 years ago So almost for 30 years the try to thove this down out throats…

@@BintloaftheMighty heh everyone is free to use Linux because it’s free

Microsoft thinks you’ve seen nothing yet. “The presentation has been revealed as part of the ongoing FTC v. Microsoft hearing, as it includes Microsoft’s overall gaming strategy and how that relates to other parts of the company’s businesses. Moving ‘Windows 11 increasingly to the cloud’ is identified as a long-term opportunity in Microsoft’s ‘Modern Life’ consumer space.” “So, what if Microsoft extended the capabilities it currently bills to businesses on a per-user, per-month basis to general consumers? That is precisely what the Redmond, Washington-based company is envisioning, according to internal documents made public thanks to the FTC vs. Microsoft hearing currently taking place.”

@@fila1445 was being as generous as I could, but the last good product out of Redmond was BASIC-80.