Lex is a good interviewer, pretty sure he knew alot of the stuff David was explaining but the way he explains it is really good for viewers that aren't as well versed.

Lex, you should try to have a security engineer, like Chris Domas on. The instruction set architecture discussion gets so interesting when you consider how other people (ab)use the operating system to do what they want.

I didn't know Bryan Cranston know this much about CPU architecture.

7:19 “These high level languages were just too inefficient” First year uni me would be crying if I heard C was a high level language

Great interview with a great guest.

RISC is faster, more energy efficient and easier to design. CISC uses less memory and is simpler for compilers. It made sense to use CISC in the 1980s, when memory was much more expensive, programming languages were lower level and compiler technology was not yet well established. Nowadays, memory is no longer a limiting factor and modern compilers/interpreters can turn high-level languages into machine code very easily. The priority now, with the mobile device revolution, is to design faster, less energy-consuming processors, and RISC is the way to go. In addition, as they are simpler to conceive, the market's transition to RISC would greatly increase competition in this segment, which has been quite stagnated in the last decade because of the Intel/AMD duopoly.

Brilliant conversation. This just closed the remaining knowledge gap I had when it comes to understanding how modern hardware and software work together.

Thinking about the fundamental instructions running on my phone’s processor are designed by this guy, puts a smile on my face. Great video!

Interview ends kind of abruptly, but I really enjoyed it! You bring out Dr Patterson’s talent for explaining these concepts to a wide audience. Wow, he must have been great in the classroom.

In university I took two courses on computer architecture where we studied the entire book, and it was my favorite set of lectures from the entire CS curriculum. The book gives you a wonderful insight into how computers and compilers actually work and how various types of speedup are achieved and measured. In the exam we had to unroll a loop in DLX among other things, and to calculate the CPI speedup. I'm so glad to actually see one of the authors behind this amazing book.

This guy has one brother who makes the highest quality crystal meth, another brother who commands the space ship enterprise, and he himself provided the best cpu design theory. Pretty talented family.

Amazing interview!

was looking for a video on mips and stumbled across the great lex

Around 8:00 minutes, the good professor starts talking about how operating systems and even application programs were written in assembly language to achieve speed. And if compilers could have been made smart enough to translate from various languages into complex instructions, that would have been wonderful but RISC makes it easier. And the he goes off on to Unix,C,C++, etc. I now understand why for the last 40 years, we have been getting programmers pretty much illiterate about computer architecture. Does the good professor know about the Burroughs B5500, B6500, B7500 series and their follow-ups? Those machines had a push down stack architecure so that they could effectively use Algol as the language in which the operating system could be implemented. As opposed to C which is a high-level machine-oriented language, you had a true high-level language for writing operating systems. And those machines were equally efficient in running Fortran, COBOL and such languages which did not need a stack for their statically declared variables. And if you want register-to-register instructions only (this is claimed to be an essential feature of RISC computers) as opposed to the IBM 360's register-to-register, register-to-memory and memory-to-memory types of (CISC) instructions, then I can tell you that the CDC 3200 dating back to the early 1960's had that type of instruction set. Every arithmetic instruction meant that the programmer painfully accessed the memory to load the two operands into two registers, performed the arithmetic operation (add, subtract, multiply, divide) on the registers and then stored the result back in main memory. What a pain for the programmer who had to program that beast in assembly language! It is the speed increases in hardware over 30 years that enabled a RISC computer to perform fast. If one implements the CDC 3200 using today's VLSI technology, I am sure it would beat any RISC processor in performance. Write a nice proposal to get a grant, get a bunch of PhD students to design the chip and write compilers for C or Smalltalk or C++, and you have a nice decade-long run of research publications and more research funding. That is what RISC was about.

I used his book in college... really enjoyed it.

Awesome intervju! One thing that I have always wondered. avx instructions, sure you might have to use an intrinsic for the compiler to use it, but it’s really great way to parallelise. How would you those instructions compare to a risk alternative? You touched a little bit on it at the end but the answer was a little short for such an important part.

I love these discussions on Computer Systems! Thanks Lex

I've seen this video like 15 times, I love RISC and its philosophy.

Very well explained difference between these 2 fundamental CPU architectures.

many small things flow through a system quicker. Works with web requests too. With web requests, there's more opportunities for caching because it's less likely that individual small responses have changed than one monolithic response.

I remember the RISC/CISC debate/battle back in the 80s. I always thought that CISC was better and all the hard work can be done by the compiler - which is a piece of software - so I felt that CISC would win-out. When Sun started moving away from the Sparc I was surprised and puzzled but I read about commercial arguments that started to change the economic argument in favour of RISC but I always felt it was like VHS beating Betamax again. I'm surprised to hear about RISC-V now. I'm not convinced things are sufficiently different to justify switching from RISC to CISC for everything but there are bound to be applications where CISC is way better. Interesting times.

Have you heard about MIPS, kids at berkey could have used that, but they wanted to look cool and started RiscV

Loving all your interviews! Great questions and good for an audience that does not know all the details. What I don’t understand is your suit ? Why you having a fancy out fit but your table looks like a mess! If you want a style element in the show hide the cables under the table !

Would be neat for a GAN to make a game of writing instruction sets and compilers.

What an interesting interview.

Bryan Cranston is way more tech-savy than I suspected

Even in the late 80s, computer games on the Commodore Amiga & Atari ST were written in assembler...

Some folks got their Smalltalk VM to be resident in the RISC CPU cache

SHAKTi is based on this RISC. Good going team Shakti. Thanks to Lex for bringing knowledge to the world. Russian Legend!

It is fascinating how this guy come up with instant, perfectly structured answers.

Excellent video

The RISC-CISC wars are long over. Neither side has won but rather the whole issue got obsoleted by long pipelines and speculative execution. For simple CPUs, which run slowly but are power optimized simple instruction sets usually win. For fast CPUs minimizing code size and therefore going a bit more CISCy wins. All modern instruction sets are hybrids and all have some form of microcode being spit into the decoding pipeline.

-A bunch of computer nerds involved in violent debate...many mothers got the call “mom im gonna need you to pick me up late”-

As someone who is pro-CISC because of economic and software development ecosystem reasons. It's important for me to hear the logical reasons and arguments for the merit of RISC architecture. Thank you.

RISC is gonna change everything Yeah, RISC is good 1995, Hackers

Talk about CRISP micro processor and DEC(Digital Equipment Corp), IBM, APPLE, Motorola 68K processors, Quick Draw, WNT, VMS, OpenVMS, OPS5, MVS, VM, VAX, APLHA, AIX, POWER, ZOS. System P, System Z, System X, System I, etc Ricky from DEC and IBM and APPLE

I can remember that the Acorn Archimedes had a RISC processor.

Acorn Archimedes was a RISC computer but it failed commercially against the Amiga & ST but the CPU, the Acorn Risc Machine (ARM) went on to conquer the world, should also mention MIPS...

I still don’t get the main question: why not having complex operations in cpu works faster. Hardware must be faster than software so calculating sha256 directly in cpu must be faster then by running primitive instructions. The only I can imagine that silicon space for logic for translating from cisc to some microcode can be used for more processing.

He forgot Intel 8088 the 8 bit version of the 8086, the interview cut of just when it was getting interesting. Like to know what he thought about Intel iAPX 432, it seems to have so much potential?

HEISENBERG

Basically, the RISC opponents didn't understand how optimizing compilers work and what they are capable of; many of them also didn't understand what high-performance processor implementation really requires. The argument basically boils down to that. One thing that Dave didn't get to is that CISC computers tend to have instructions that execute *more slowly* than a sequence of simpler instructions...from *their own* instruction set. This was very true of the Digital Equipment Corporatation (DEC) VAX machines. In some ways, the VAX was the CISC-y-est CISC. If you understand hardware and compilers (and software frameworks), you understand why RISC makes sense and why you would never choose to design a CISC architecture from scratch. Even the original ARM architecture was not really a RISC. ARM V8 and v9 are much more simple.

"RISC architecture is going to change everything"

They jumped the open source instruction set

WoW great clip from the guy whose text books we have read in uni

I love these tech radicals.

Give him a goatee, and this man is Heisenberg.

Nice talk

Jim Keller is a journeyman computer architect. Patterson has been slapping the monkey in academia his whole life. Patterson has been working on an ISA for forty freakin' years.

10:40 good sir, if they are inefficient languages, still in the context of compiled languages, which ones are?

Worked for Compaq in the mid 80's and remember these arguments. Back then x86=Intel=PC=DOS = "Inexpensive" computer. Yes, Compaq had SGI workstations to help out designing the x86 boxes being sold. It wasn't which architecture was technically superior, everyone new THAT, it was what chip set is the cheapest. Just ask "Sun Micro, Silicon Graphics, DEC, HP, NeXT". CISC/RISC is a dead argument in the multi-core universe we live in.

Prior to university, of course, the vast majority of kids or students who were into computers, which at the time meant 8-bit home computers had almost no access to the Hennessy and Patterson RISC research. All I knew was from articles in the mid-1980s on the Inmos Transputer and Acorn Risc Machine. archive.org/details/PersonalComputerWorld1985-11/page/136/mode/2up So, we were properly introduced to RISC only at University (in my case UEA, Norwich) as part of the computer architecture modules. So, normally, I've understood RISC to be a performance or energy optimisation trade-off. That is, the question is how to get the most work out of a given set of transistors in a CPU, and what RISC does is trade under-utilised circuitry (e.g. for seldom used instructions) for speed. In a similar sense, complex decoding represents an under-utilisation of circuitry (which adds to propagation delays, thus limiting pipeline performance) and because microcode is effectively a ROM cache: ISA ==> Microcode ==> Control Signals, it's better to use the resources to implement an actual cache or a larger register set. Etc.

"machine language" was the term I was taught in data processing in the '70s. Apple will be using RISC in all their products.

if risc is better than cisc, then why does "just in time compiled" code work so well; the thing that can best understand how to execute a complex instruction would be a CPU. the breakdown of a complex instruction into micro instructions is what happens inside a CISC cpu, why is this less efficient than the compiler doing it up front into RISK instructions?

nice video!

Heisenberg guy is telling truth listen to him 😂 Hope it won’t end up like in the movie..

I am following Lex since when he had 2k connections in linkedin. He also replied to me in past multiple times. He's my idol. Honestly the apex of male peak performance.

As an early career web developer, CISC architecture sounds like an absolute nightmare.

RISC-V ?

This a gold mine for students. Mind your citations children!!

Ironically, ARM added Jazelle to execute Java bytes codes natively.

The guy who literally wrote the book on CPU design.

Heisenberg actually didn’t die, he just switched to manufacturing processors

One man’s software is another man’s hardware

I personally like the word Opcode or operation code rather than calling it instruction or instruction set

Brilliant.

CISC is not secured, easy to put backdoor in it; hard to audit CISC platform.

Why is RISC not so efficient to access the ram?

Meth to silicon?

For a moment I though this is a Breaking Bad episode...

My textbook author ;) great book

but I'm so nostalgic about x86. can't let go and I somehow started disliking mobile devices with ARM chips

With Apple switching all of their computers over to RISC, and RISC running inside almost all tablets and cellphones, it sounds like RISC won.

PS3 was RISC, right?

Hmm, 6:00. Thats not how it works. Most of the extra instructions that have been added the last 20 years have been only accelerators. For example SIMD SSE4, or a more obvious example AES instruction set that makes compression and decompression about 20 times faster. All modern heavy compute operations on windows rely on running modern compilers with support for a few optimized instructions like AVX2. You also have pipe lining and branch prediction making the x86 side much more attractive. The instruction set was between AMD and intel have ended but 20 years ago we had competing and completely different instruction sets like 3dNow. 12:30, thats BS if you know programming. The very efficient instruction sets are widely used even by more high level languages. I have been a computer engineer/developer for over 15 years so what do I know. 😎 I think the majority was right back then if we look at where we are now. General compute is never as fast as ASICS which is basically what advanced instruction sets are.

why we could not have something close to universal or even dynamic or reprogrammable instruction set instead of 17 different hidden and fixed sets ?

If you look at current intel architecture, it is not a pure CISC processor, it is a hybrid (ukposts.info/have/v-deo/hn6YmJmla4upkp8.html) 14:40 . It has a CISC wrapper around a RISC core .

HAL says hello

But, but, but, isn't the memory speed your limiting factor? If you execute more instructions and your are waiting on the memory to serve them, wouldn't that make it slower? Have you accomplished your goal? I don't really want to debate this here, I'm just saying that the Intel itanium wasn't a successful microprocessor. Macs ran for a long time on Rs6000 chips and now run on Intel. I just don't see that RISC is commercially successful. Perhaps, it is a better microprocessor design, but then why aren't Macs still using them? I've been in the computer biz for a long time. Written a bunch of assembly language. I'm just not convinced that RISC won this competition, as much as I hate the Intel instruction set.

Walter White if he not a chemist

Damn Mr White you know about computers too!?

hey breaking bad chracter is back, nice to see you professor

Sophie Wilson.

Think the guys that write the compiler code are the real wizards, but I'm kinda stupid.

i shall not add... lol to touchy of situations.

RISC will start catching up if you could pay less than us$2k for a server and run Linux on it.

Wow, I didn't know Walter White knew so much about microprocessors.

Did anyone make a Malcolm in the Middle reference in the comments yet? Y'know, like something about Hal designing HAL? I'll leave the completion of this joke as an exercise for the reader.

the advance is the fetch of the commands because cisc has more commands it need more time to get a instruction as risc so in the beginning cisc was risc but because people became lazy and wanted multiplications in the instruction set because code would be come easier and the memory need became smaller to store the commands , less needed Also at that time memory was expensive .. So when memory became cheaper and clock circles became higher .. risc because faster . But around that time Intel and all others Microsoft blocked these CPUs Look at the story of the BBC ACHIMEDES .. there is your first real Risc computer with OS !! maybe still ome of the best ever !!

Prof. Patterson :) Go Bears!

the question you didn't ask: if risc and cisc where engins ,which one would be more powrfull?

My simple analogy Big block muscle cars have much more scalability than small piston high rpm rice burners Because the rice burner technology or in this case the complex sets don't scale well and hit a wall

"RISC is good"

If you didn't know this you didn’t know much about computers

I feel kind of like he is wrong. On arm processors all instructions take 4 cycles since and x86 instructions are variable, today x86 machines basically are 4 times faster. I still want epic ( Explicitly parallel instruction computing ) architecture .

No mention of pipelining, one of the most important leverages for RISC vs CISC early on as a means to achieve single cycle instructions vs many cycles even for some of the simple CISC ones. No mention of the amount of registers which was/is typically several fold more on RISC; that's one of the things making it easier to target for a compiler. No mention of how the cost of CPU cache changed historically, which made it first advantageous for CISC then for RISC. This interview is really really dumbed down, so as to wonder what the audience for it would be... Pipelining and register allocation are very interesting topics, and defining ones in processor architectures.

Wow

Has this guy ever taped out a chip? Has he ever produced an actual product?

Is just me or is this SCARY asf

Almost all chips are RISC. Most Chips just convert there conventional code to a simple code in the CPU. Intel did this with the Pentium 4. So RISC did win. Also VLIW was superseded by SIMD in the the FPU via special instructions or in the GPU. Modern Chips just glue all these different approaches together and hide it in the compiler or CPU instruction decoder.